Method for processing semiconductor wafers

Abstract

Abstract A METHOD FOR PROCESSING SEMICONDUCTOR WAFERS IN WHICH EMITTER-COLLECTOR SHORTS ARE AVOIDED IN TRANSISTORS FORMED IN THE SEMICONDUCTOR WAFER. INVESTIGATION OF EMITTER-COLLECTOR SHORTS IN SEMICONDUCTOR WAFERS HAS DEMONSTRATED BY USE OF SPECIAL ETCH TECHNIQUES THAT EMITTER COLLECTOR SHORTS ARE CUASED BY DISLOCATIONS IN THE CRYSTAL LATTICE OF THE SEMICONDUCTOR WAFER. THE DISLOCATIONS ARE INTRODUCED INTO THE SEMICONDUCTOR WAFER DURING THE VARIOUS PROCESSING STEPS REQUIRING THE SEMICONDUCTOR WAFER TO BE MAINTAINED AT AN ELEVATED TEMPERATURE. THE DISLOCATIONS AND HENCE EMITTRCOLLECTOR SHORTS ARE AVOIDED BY A METHOD IN WHICH A SEMI- CONDUCTOR WAFER IS PLACED INTO A FURNACE AT A TEMPERATURE WHICH IS LESS THAN THAT WHICH CAUSES DISLOCATIONS AND THEN THE FURNACE AND HENCE THE SEMICONDUCTOR WAFER IS HEATED UP WITH THE TEMPERATURE RISING AT A RATE BELOW THAT WHICH WOULD INTRODUCE THERMAL STRESS AND CAUSE DISLOCATIONS. AFTER A DESIRED OPERATING TEMPERATURE IS REACHED A DESIRED OPERATION IS PERFORMED ON THE SEMICONDUCTOR WAFER AND THEN THE ENTIRE SEMICONDUCTOR WAFER IS COOLED AT A RATE SIMILR TO THAT BY WHICH THE TEMPERATURE WAS PREVIOUSLY RAISED.

Inventors

• 👤 D Allison
• 👤 J Schweizer

Bibliographic Details