US3828262A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Device for the automatic adjustment of the amplitude of signals
Assignee: ENTERPRISE DE RECHERCHES D ACTIVITES PETROLIERES ELF FR
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Filing: 1973-04-16
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Granted: 1974-08-06
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Expires: 1993-04-16
Abstract
Abstract Automatic adjustment of amplitude is carried out on any predetermined half-wave of a recurrent analog signal by means of a device comprising a variable-gain amplifier, a storage circuit for indicating the amplitude of each output signal of the amplifier, a decision logic circuit which assumes a logical state A if the indicated amplitude does not attain a lower threshold level or a logical state D if the indicated amplitude exceeds an upper threshold level, a bidirectional register and a synchronization and control logic system in which means placed at the output of the amplifier eliminate signals smaller in amplitude than a predetermined value and transmit signals to a counter, the state of which is compared with two series of preindicated numbers by means of a comparator having outputs connected to the storage circuit and the decision logic circuit.
Inventors
- 👤 F Trocqueme
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 02:46
CPC Classifications
H; H03; H03G; H03G7/00; H03G7/002; H03G7/005
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
270 words
A device for the automatic adjustment of the amplitude of recurrent analog signals with respect to a lower threshold level and an upper threshold level, wherein said device comprises: an amplifier to which said signals are applied and the gain of which is capable of varying in steps under the action of switching elements; a storage circuit for indicating the amplitude of each output signal of said amplifier with respect to said levels; a decision logic circuit having the design function of producing as a function of the idications collected by said storage circuit a logical state A if the indicated amplitude does not attain said lower threshold level or a logical state D if the indicated amplitude exceeds said upper threshold level; a bidirectional register, the incrementation of which is controlled by said logical state A and the decrementation of which is controlled by said logical state D said register including means to produce signals for controlling said switching elements in accordance with the count in said bidirectional register; and a synchronization and control logic system comprising means for eliminating signals smaller in amplitude than a predetermined value U, said means being placed at the output of said variable-gain amplifier, a counter incremented by the signals derived from said last named meaNs, a comparator for comparing the state of said counter with two series of preindicated numbers, the outputs of said comparator being connected to said storage circuit and to said decision logic circuit, and an adjustable delay device which is driven by a synchronizing signal and the output of which drives a counting permission system for said counter.
Claim 2
Independent Claim
270 words
A device for the automatic adjustment of the amplitude of recurrent analog signals with respect to a lower threshold level and an upper threshold level, wherein said device comprises: an amplifier to which said signals are applied and the gain of which is capable of varying in steps under the action of switching elements; a storage circuit for indicating the amplitude of each output signal of said amplifier with respect to said levels; a decision logic circuit having the design function of producing as a function of the idications collected by said storage circuit a logical state A if the indicated amplitude does not attain said lower threshold level or a logical state D if the indicated amplitude exceeds said upper threshold level; a bidirectional register, the incrementation of which is controlled by said logical state A and the decrementation of which is controlled by said logical state D said register including means to produce signals for controlling said switching elements in accordance with the count in said bidirectional register; and a synchronization and control logic system comprising means for eliminating signals smaller in amplitude than a predetermined value U, said means being placed at the output of said variable-gain amplifier, a counter incremented by the signals derived from said last named meaNs, a comparator for comparing the state of said counter with two series of preindicated numbers, the outputs of said comparator being connected to said storage circuit and to said decision logic circuit, and an adjustable delay device which is driven by a synchronizing signal and the output of which drives a counting permission system for said counter.
Claim 3
Dependent Claim
63 words
A device according to claim 1, wherein the storage circuit is constituted by two comparators connected in parallel at the output of said amplifier and adjusted so as to be triggered in one case at said lower threshold level and in the other case at said upper threshold level, and by two flip-flops each connected to the output of one of said comparators.
Claim 4
Dependent Claim
67 words
A device according to claim 2, wherein the decision logic circuit is constituted by a first AND-gate having two inputs each connected to the output Q of a flip-flop of the storage circuit and by a second AND-gate having two inputs each connected to the output Q of a flip-flop of the storage circuit, said gates being intended to deliver respectively said logical states A and D.
Claim 5
Dependent Claim
71 words
A device according to claim 3, wherein: those outputs of said comparator which correspond to the first series drive inputs for permission of changeover to state 1 of said flip-flops of said storage circuit whilst the outputs corresponding to the second series drive the inputs of said AND-gates of said decision logic circuit; and the output of said adjustable-delay device drives the reset inputs of said flip-flops of said storage circuit.
Claim 6
Dependent Claim
37 words
A device according to claim 4, wherein said means for eliminating the signals which are smaller in amplitude than the value U are constituted by a double-threshold device having the respective thresholds + U and - U.
Claim 7
Dependent Claim
78 words
A device according to claim 4, wherein said comparator is constituted by an even number of AND-gates comprising a number of inputs corresponding to the number of outputs of said counter, each input of said last mentioned gates being connected to one output of said counter, a predetermined number of inputs of said last mentioned gates being provided with an inverter so that the output of each gate aforesaid should correspond to a predetermined order of said counter.
Claim 8
Dependent Claim
56 words
A device according to claim 4, wherein a rectangular signal having a time-width t and derived from the adjustable-delay device drives the input of said counter through a third AND-gate whose other input is connected to the output of a fourth AND-gate, the inputs of said fourth gate being connected to the outputs of said counter.
Claim 9
Dependent Claim
70 words
A device according to claim 4, wherein said device has an output constituted by an OR-gate whose inputs are driven by the output of the adjustable-delay device and by the AND-gate outputs which are driven by the outputs of said counter, a predetermined number of inputs of said last mentioned AND-gates being provided with inverters in order that each AND-gate aforesaid should correspond to a predetermined order ot said counter.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-08-05 | 1978-02-04 | 1978-08-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-08-05 | 1982-02-04 | 1982-08-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-08-05 | 1986-02-04 | 1986-08-06 | $7700.00 | Window Closed / Lapsed |