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US3827032A Expired / Lapsed US ⏱️ 0.0 years remaining

Differentially coupled memory arrays

Assignee: INTEGRATED MEMORIES Inc
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Filing: 1972-06-19
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Granted: 1974-07-30
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Expires: 1992-06-19
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Abstract

Abstract A read-only memory plane has a plurality of storage elements arranged in a matrix of columns and rows. Drive means are associated with the columns of elements for energizing the elements and a plurality of sense lines are associated with the row of elements for determining the information content of the storage elements. A second matrix of storage elements is within the memory plane in tandem with the first matrix of elements. A second set of drive means and sense lines are provided for the read-out of the second array of storage elements. The information read-out is manifest in the presence or absence of signals induced in the sense lines when the storage elements are energized. Pairs of sense lines one in each pair from the first array and the other from the second array, are coupled to respective differential amplifiers for amplifying the induced signals and for rejecting any stray signals including background noise which would be common to the two arrays.

Inventors

  • 👤 W Abbott
  • 👤 T Chen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 04:23
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/04

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 178 words
A capacitive memory comprising: a first memory plane having a plurality of conductive sense lines, a plurality of conductive drive lines disposed substantially orthogonal to said sense lines, a ground plane disposed between said sense and drive lines for providing electrostatic shielding between them, said ground plane having a plurality of apertures at certain intersections between said sense and drive lines which define a plurality of coupling boundaries for allowing capacitive coupling between said lines within said boundaries at said locations upon the application of an electronic signal to at least one of said drive lines; a second memory plane substantially similar in structure and dimension as said first memory plane having sense lines, drive lines and a ground plane having a plurality of apertures at possibly different intersections between sense and drive lines; differential signal processing means coupling the sense lines associated with said first plane to the sense lines associated with said second plane and means for driving the sense lines associated with said first plane independently from the sense lines associated with said second plane.
Claim 2
Dependent Claim 178 words
A capacitive memory comprising: a first memory plane having a plurality of conductive sense lines, a plurality of conductive drive lines disposed substantially orthogonal to said sense lines, a ground plane disposed between said sense and drive lines for providing electrostatic shielding between them, said ground plane having a plurality of apertures at certain intersections between said sense and drive lines which define a plurality of coupling boundaries for allowing capacitive coupling between said lines within said boundaries at said locations upon the application of an electronic signal to at least one of said drive lines; a second memory plane substantially similar in structure and dimension as said first memory plane having sense lines, drive lines and a ground plane having a plurality of apertures at possibly different intersections between sense and drive lines; differential signal processing means coupling the sense lines associated with said first plane to the sense lines associated with said second plane and means for driving the sense lines associated with said first plane independently from the sense lines associated with said second plane.
Claim 3
Dependent Claim 41 words
The memory as defined in claim 1 wherein said signal processing means couples at least one pair of sense lines, one line of said pair being associated with said first plane and the other line being associated with said second plane.
Claim 4
Dependent Claim 60 words
The memory as defined in claim 2 wherein said signal processing means comprises a plurality of differential amplifier means, each of which couples said pairs of sense lines for amplifying any signals induced in said sense lines, for indicating the information content of the memory planes, and for rejecting any undesirable stray signals which would be common to said planes.
Claim 5
Dependent Claim 21 words
The memory as defined in claim 3 wherein said memory planes form parallel planes which are in tandem with one another.
Claim 6
Dependent Claim 32 words
The memory as defined in claim 4 wherein said second memory plane is a mirror image of said first memory plane provided that the information content of said planes may be different.
Claim 7
Dependent Claim 94 words
A capacitive memory comprising: a first memory plane having a plurality of conductive sense lines and a plurality of conductive drive lines disposed substantially orthogonal to said sense lines; a second memory plane substantially similar in structure and dimension as said first memory plane having sense lines and drive lines; differential signal processing means coupling the sense lines associated with said first plane to the sense lines associated with said second plane; and means for driving the sense lines associated with said first plane independently from the sense lines associated with said second plane.
Claim 8
Dependent Claim 94 words
A capacitive memory comprising: a first memory plane having a plurality of conductive sense lines and a plurality of conductive drive lines disposed substantially orthogonal to said sense lines; a second memory plane substantially similar in structure and dimension as said first memory plane having sense lines and drive lines; differential signal processing means coupling the sense lines associated with said first plane to the sense lines associated with said second plane; and means for driving the sense lines associated with said first plane independently from the sense lines associated with said second plane.
Claim 9
Dependent Claim 41 words
The memory as defined in claim 6 wherein said signal processing means couples at least one pair of sense lines, one line of said pair being associated with said first plane and the other line being associated with said second plane.
Claim 10
Dependent Claim 60 words
The memory as defined in claim 7 wherein said signal processing means comprises a plurality of differential amplifier means, each of which couples said pairs of sense lines for amplifying any signals induced in said sense lines, for indicating the information content of the memory planes, and for rejecting any undesirable stray signals which would be common to said planes.
Claim 11
Dependent Claim 79 words
The memory as defined in claim 8 wherein respective ground planes arE disposed between the sense and drive lines of said first and second planes, each of said ground planes having a plurality of apertures at certain intersections between said sense and drive lines which define a plurality of coupling boundaries for allowing capacitive coupling between said lines within said boundaries at said locations upon the application of an electronic signal to at least one of said drive lines.

References Cited (Backward Citations)

US3003143A Cited
US3183490A Cited
US3319233A Cited
US3383663A Cited
US3350691A Cited
US3404382A Cited
US3506969A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-07-29 1978-01-28 1978-07-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-07-29 1982-01-28 1982-07-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-07-29 1986-01-28 1986-07-30 $7700.00 Window Closed / Lapsed

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