← Back to Patent Explorer
US3826908A Expired / Lapsed US ⏱️ 0.0 years remaining

Data telecommunications analyzer

Assignee: Paradyne Corp
•
Filing: 1973-02-05
•
Granted: 1974-07-30
•
Expires: 1993-02-05
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A protocol analyzer for monitoring line control characters in a binary synchronous data telecommunications system comprising a control character trap means having a character decode means and character memory means to decode and buffer any of a plurality of predetermined line control characters and a visual display means to selectively observe the buffered control characters. The analyzer also includes an interface test means to monitor and display standard EIA RS-232 control lines and DAA control line signals from the business equipment means and data communications lines respectively and an analog test means including visual and audio display means for monitoring data communications line signals.

Inventors

  • 👤 L Weathers
  • 👤 K Nordling
  • 👤 R Ruffner

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 23:04
CPC Classifications
H; H04; H04L; H04L5/00; H04L5/14

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 141 words
A data telecommunications analyzer for monitoring data characters within a data stream: said data telecommunication analyzer comprising character trap means including character decode means having circuitry to decode and identify any of a first predetermined plurality of data characters, said circuitry generating a first output signal corresponding to the specific predetermined data character received and a second output signal upon receipt of any of said first predetermined data characters in a predetermined pattern, character memory means coupled to said character decode means to receive and store said first output signal, display means coupled to said character memory means to display at least a portion of said plurality of predetermined data characters and control means coupled to said character decode means and said character memory means, said control means including mode control means to alternately select a read or write operating mode.
Claim 2
Dependent Claim 141 words
A data telecommunications analyzer for monitoring data characters within a data stream: said data telecommunication analyzer comprising character trap means including character decode means having circuitry to decode and identify any of a first predetermined plurality of data characters, said circuitry generating a first output signal corresponding to the specific predetermined data character received and a second output signal upon receipt of any of said first predetermined data characters in a predetermined pattern, character memory means coupled to said character decode means to receive and store said first output signal, display means coupled to said character memory means to display at least a portion of said plurality of predetermined data characters and control means coupled to said character decode means and said character memory means, said control means including mode control means to alternately select a read or write operating mode.
Claim 3
Dependent Claim 37 words
The data telecommunications analyzer of claim 1 wherein said control means generates write command when said mode control means is in said write mode and a read command when said mode control is in said read mode.
Claim 4
Dependent Claim 100 words
The data telecommunications analyzer of claim 2 wherein said control means further including character synchronizer means and input control means, said character synchronizer means coupled to said character decode means and said input control means, said mode control means coupled to said input control means, said character synchronizer means including circuitry to generate a synchronization pulse in response to said second output signal, said input control means including circuitry to generate said write command signal in response to said synchronization pulse when said mode control is in said write mode to enable said memory means to store said first signal.
Claim 5
Dependent Claim 64 words
The data telecommunications analyzer of claim 3 wherein said mode control means includes first switching means, said switching means includiNg first switch to alternately select said write or said read mode, and second switch to generate said read command, said control means generating said read command signal in response to actuation of said second switch when said first switch is in said read mode.
Claim 6
Dependent Claim 84 words
The data telecommunications analyzer of claim 1 wherein said character decode means circuitry generates a third output signal in response to receipt of a preselected number of said predetermined plurality, said control means further including abandon synchronization means coupled to said character decode means and said character synchronization means, said abandon synchronization means including circuitry to receive said third output signal and generate an abandon synchronization pulse in response thereto, said abandon synchronization pulse being fed to said character synchronization means to abandon synchronization.
Claim 7
Dependent Claim 95 words
The data telecommunications analyzer of claim 1 wherein said character decode means circuitry generates a fourth output signal in response to receipt of a second predetermined plurality of data characters, said control means further including input inhibit means coupled to said character decode means and input control means, said input inhibit means including circuitry to receive said fourth output signal and generate an inhibit pulse signal in response thereto, said inhibit pulse signal being fed to said input control means to disable said write command signal when said mode control is in said write mode.
Claim 8
Dependent Claim 30 words
The data telecommunications analyzer of claim 2 wherein said character memory means comprises shift register means to store said first output signals sequentially as received from said character decode means.
Claim 9
Dependent Claim 67 words
The data telecommunications analyzer of claim 7 wherein said shift register means comprises a plurality of shift registers, each said shift register corresponding to one of said first predetermined plurality of characters and wherein said first output signal comprises a multiple bit character word fed to said shift registers in parallel, each bit of said character word corresponding to one of said first predetermined plurality of characters.
Claim 10
Dependent Claim 46 words
The data telecommunications analyzer of claim 8 wherein said write command comprises an enable pulse and shift pulse and said shift registers each comprises a plurality of positions such that said character words are advanced through said shift registers sequentailly as said character words are received.
Claim 11
Dependent Claim 76 words
The data telecommunications analyzer of claim 8 wherein said display means comprises a plurality of visual indicator means cooperatively forming a matrix of rows and columns, said visual indicator means coupled to said character memory means such that each said row corresponds to one of said first predetermined characters and each said column corresponds to the relative position within said shift registers whereby said display matrix displays said first predetermined characters in relative positions as received.
Claim 12
Dependent Claim 73 words
The data telecommunications analyzer of claim 10 wherein each said shift register comprises a first and second shift register coupled in series, said first and second register coupled by feedback loop, said display matrix being coupled to said corresponding first shift register such that said character words may be advanced through said first and second shift registers and recirculated for repeated viewing upon actuation of said second switch of said first switching means.
Claim 13
Dependent Claim 41 words
The data telecommunications analyzer of claim 8 wherein said read command comprises an enable signal and a memory address advance pulse to advance said character words through said shift register on actuation of said second switch of said first switching means.
Claim 14
Dependent Claim 40 words
The data telecommunications analyzer of claim 12 wherein said control means further includes counter means coupled to said display means to visually display the sequential order of said character word as received in the first position of said shift registers.
Claim 15
Dependent Claim 32 words
The data Telecommunications analyzer of claim 4 wherein said mode control means further includes third switch to clear data characters from said character memory means, and said display means upon actuation thereof.
Claim 16
Dependent Claim 51 words
The data telecommunications analyzer of claim 1 wherein said mode control means includes a second switching means coupled to said character decode means and said character memory means, said mode control means including circuitry such that at least one of said predetermined characters may be varied by said second switching means.
Claim 17
Dependent Claim 24 words
The data telecommunications analyzer of claim 1 wherein said predetermined pattern comprises at least two of said first predetermined plurality of characters received consecutively.
Claim 18
Dependent Claim 48 words
The data telecommunications analyzer of claim 1 wherein said first output signal comprises a character word including a plurality of bits corresponding to one of said first predetermined plurality of characters, such that each said character word has identity with one of said first plurality of predetermined characters.
Claim 19
Dependent Claim 23 words
The data telecommunications analyzer of claim 17 wherein at least one bit of said character word indicates the origin of said character word.
Claim 20
Dependent Claim 36 words
The data telecommunications analyzer of claim 1 further including interface test means including circuit means and visual indicator means coupled to the date transmission lines to receive and indicate the presence of preselected control line signals.
Claim 21
Dependent Claim 24 words
The data telecommunications analyzer of claim 1 further including analog test means including circuit means and indicator means to monitor transmission line signal performance.
Claim 22
Dependent Claim 19 words
The data telecommunication analyzer of claim 20 wherein said indicator means comprises audio indicator means and visual indicator means.

References Cited (Backward Citations)

US3364473A Cited
US3382487A Cited
US3631455A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-07-29 1978-01-28 1978-07-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-07-29 1982-01-28 1982-07-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-07-29 1986-01-28 1986-07-30 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag