Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
67 words
A system for transmitting information which comprises a. a source which continuously provides carrier signals of constant frequency, b. means for shifting the phase of said carrier signals alternately in opposite directions in the absence of said information, c. means for shifting the phase of said signals in accordance with said information when said information is present, d. means for continuously transmitting said phase shifted carrier signals.
Claim 2
Independent Claim
67 words
A system for transmitting information which comprises a. a source which continuously provides carrier signals of constant frequency, b. means for shifting the phase of said carrier signals alternately in opposite directions in the absence of said information, c. means for shifting the phase of said signals in accordance with said information when said information is present, d. means for continuously transmitting said phase shifted carrier signals.
Claim 3
Dependent Claim
51 words
The invention as set forth in claim 1 wherein said information is provided at a plurality of inputs, means for multiplexing said inputs so as to provide a modulating signal, and means for applying said modulating signal to said phase shifting means as set forth in paragraph (c) of claim 1.
Claim 4
Dependent Claim
71 words
The invention as set forth in claim 2 wherein each of said plurality of inputs is a separate sensor, said multiplexing means includes means for encoding said inputs into digital signal messages having different combinations of ''''1'''' and ''''0,'''' and said modulating means includes means for shifting the phase of said carrier signal 90* in one direction to represent a ''''1'''' and 90* in the opposite direction to represent an ''''0.''''
Claim 5
Dependent Claim
85 words
The invention as set forth in claim 3 wherein said encoding means comprises a code converter, a commutator, and a shift register means including said commutator for successively sampling a plurality of said inputs, said sampled inputs being applied to said converter to provide said messages, means for transferring said messages to said shift register, and means for inhibiting said commutator when information is present at any of said inputs until said message is sequentially read out of said shift register into said modulating means.
Claim 6
Dependent Claim
49 words
The invention as set forth in claim 4 wherein said phase shifting means as set forth in paragraph (b) of claim 1 includes means for continuously generating signals representing alternately ''''1''''s and ''''0''''s, and means for applying said last named signals to the serial input of said shift register.
Claim 7
Dependent Claim
110 words
The invention as set forth in claim 3 wherein each of said sensor inputs is a separate switching device which is set to represent the presence of information, means for resetting said switching deviceS for said plurality of sensor inputs which are sampled by said commutator upon the sampling thereof, and means for resetting other of said switching devices for those of said sensor inputs having priority only after messages corresponding to said sensor inputs are read out of said shift register a plurality of times, and means connecting said priority sensor input switching devices to said commutator for inhibiting said commutator while said priority sensor input devices are set.
Claim 8
Dependent Claim
89 words
The invention as set forth in claim 3 wherein said modulating means includes a phase shift network, in said carrier signal path, a data input line for carrying signals representing said ''''1''''s and ''''0''''s, and means for changing in said one direction during a data bit transmission interval, the phase shift interposed by said network when said line carries a ''''1'''' signal and for changing in said opposite direction, during a data bit transmission interval, the phase shift interposed by said network when said line carries an ''''0'''' signal.
Claim 9
Dependent Claim
138 words
The invention as set forth in claim 7 wherein said network is a ladder network having a plurality of separate switching devices connected in series, each in a different shunt branch of said network, a counter having a plurality of stages, means for applying a plurality of clock pulses to said counter at least equal in number to its counting capacity during each data bit transmission interval, gates connecting the outputs of said counter which represent the number of pulses stored therein and the complement of said number to said switching devices, said gates being connected to said data line for enabling those gates connected to said counter outputs which represent said number and those gates connected to said counter outputs which represent the complement of said number, when said line carries a ''''1'''' and an ''''0'''' respectively.
Claim 10
Dependent Claim
23 words
The invention as set forth in claim 1 wherein said means for continuously transmitting is a radio link to a remote receiving station.
Claim 11
Dependent Claim
122 words
A receiving system for data carried on a selected carrier frequency which is phase modulated in accordance with said data, said systems comprising a. a narrow-band pass filter having a passband at said frequency which is about 1 Hz wide. b. a phase demodulator including a loop having a phase discriminator output connected to a low pass filter having an upper frequency cut off of less than 1 Hz, a variable frequency oscillator controlled by said low pass filter output, said variable frequency oscillator output and said narrowband filter output being coupled to the inputs of said phase discriminator and c. means responsive to the amplitude of said low pass filter output for converting said low pass filter output into digital data.
Claim 12
Dependent Claim
122 words
A receiving system for data carried on a selected carrier frequency which is phase modulated in accordance with said data, said systems comprising a. a narrow-band pass filter having a passband at said frequency which is about 1 Hz wide. b. a phase demodulator including a loop having a phase discriminator output connected to a low pass filter having an upper frequency cut off of less than 1 Hz, a variable frequency oscillator controlled by said low pass filter output, said variable frequency oscillator output and said narrowband filter output being coupled to the inputs of said phase discriminator and c. means responsive to the amplitude of said low pass filter output for converting said low pass filter output into digital data.
Claim 13
Dependent Claim
50 words
The invention as set forth in claim 10 wherein said carrier is continuously phase modulated in opposite directions at the data rate in the absence of data signals, further comprising means responsive to said low pass filter output for detecting the absence of changes in amplitude for monitoring system status.
Claim 14
Dependent Claim
100 words
The invention as set forth in claim 11 wherein said system status monitoring means comprises means for comparing said low pass filter output with reference amplitude levels for detecting and providing an output when said low pass filter output is above or below said reference levels, a counter means for applying pulses to said counter at a multiple of said data rate so long as said comparing means output is provided, means for resetting said counter in response to a transition in said comparing means output, and means for providing an alarm indication when said counter reaches a predetermined count.
Claim 15
Dependent Claim
46 words
The invention as set forth in claim 10 including means for converting said low pass filter output into a sequence of digital signals, a second variable frequency oscillator, means for controlling the frequency of said oscillator in accordance with said digital signals to provide cLock signals.
Claim 16
Dependent Claim
104 words
The invention as set forth in claim 13 including a shift register means for applying said digital signals to the serial input of said register and shifting said signals through said register with said clock signals, a decoder responsive to a plurality of parallel outputs of said register for decoding said parallel outputs into a plurality of channels, each of said channels having an output indicator for designating the reception of data in said channel, and means responsive to the presence of a synchronizing message at said parallel register outputs for enabling the transfer of a data message from said decoder to said indicators.