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US3825843A Expired / Lapsed US ⏱️ 0.0 years remaining

Selective distortion compensation circuit

Assignee: AT&T Inc
•
Filing: 1973-06-08
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Granted: 1974-07-23
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Expires: 1993-06-08
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Abstract

Abstract Nonlinear distortion in the transmission signal of a signal path is selectively compensated by the introduction of a distortion cancelling signal. A compensation circuit utilizes a portion of the transmission signal to generate the signal used in cancelling the distortion. In one embodiment of the compensation circuit, a squarer and a multiplier serve to produce a third order distortion cancelling signal. This distortion cancelling signal is then coupled to the signal path with its phase and amplitude individually adjusted to cause cancellation of the nonlinear distortion in the signal path. In an alternate embodiment of the compensation circuit, a balanced arrangement eliminates feedthrough of the transmission signal through the compensation circuit.

Inventors

  • 👤 R Felsberg
  • 👤 H Miedema

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 19:12
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/32; H03F1/3241; H03F1/3252; H03F1/3276; H04; H04B; H04B3/00; H04B3/02; H04B3/04; H04B3/06; H03F2200/00; H03F2200/198

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 150 words
A distortion compensating circuit for a signal path subject to distortion comprising: means for extracting a portion of the signal in said signal path; squaring means for operating on a portion of the extracted signal to produce a second order output signal; multiplier means connected to receive said second order output signal and a portion of the extracted signal and for multiplying the same to produce a third order output signal; means for adjustably controlling the phase and amplitude of said third order output signal to provide a compensating signal having a complementary phase relationship with and an amplitude substantially equal to third order distortion effects present in said signal path; means for coupling the compensating signal to said signal path to substantially eliminate said third order distortion effects from said signal path; and means for eliminating feedthrough signal components from the compensation signal coupled back into said signal path.
Claim 2
Dependent Claim 150 words
A distortion compensating circuit for a signal path subject to distortion comprising: means for extracting a portion of the signal in said signal path; squaring means for operating on a portion of the extracted signal to produce a second order output signal; multiplier means connected to receive said second order output signal and a portion of the extracted signal and for multiplying the same to produce a third order output signal; means for adjustably controlling the phase and amplitude of said third order output signal to provide a compensating signal having a complementary phase relationship with and an amplitude substantially equal to third order distortion effects present in said signal path; means for coupling the compensating signal to said signal path to substantially eliminate said third order distortion effects from said signal path; and means for eliminating feedthrough signal components from the compensation signal coupled back into said signal path.
Claim 3
Dependent Claim 53 words
The distortion compensating circuit of claim 1 wherein the extracting means comprises a resolver for providing a predetermined phase shift between the signal in said signal path and the signal energy extracted therefrom, said phase shift being substantially constant over the frequency band and dynamic range of the signal in said signal path.
Claim 4
Dependent Claim 154 words
The distortion compensating circuit as defined in claim 1 comprising first means for equally dividing the second order ouput signal into first and second components shifted 180* from each other, second means for equally dividing a portion of the extracted signal into first and second components shifted 180* from each other, a first multiplier connected to receive the first components from the first and second dividing means, a second multiplier connected to receive the second components from the first and second dividing means, said first and second mutlipliers providing third order output signals by multiplying their respective input signals together, and signal combining means for adding the third order output signals from said first and second multipliers in phase to produce a single third order output signal, said signal combining means serving to eliminate those unwanted portions of the multiplier input signals that feed through to the outputs of said first and second multipliers.
Claim 5
Dependent Claim 102 words
The distortion compensating circuit as defined in claim 3 wherein said first and second multipliers each comprise Schottky barrier diodes connected in a ring quad circuit and biasing means connected to each of said ring quad circuits, said biasing means supplying a low potential for operating said Schottky barrier diodes in the square-law region of their characteristics, the respective biasing means for each multiplier being individually adjustable to make these portions of the input signals that feed through said first multiplier equal to the feedthrough components of said second multiplier so as to cancel each other out in said signal combining means.
Claim 6
Dependent Claim 278 words
A distortion compensating circuit for a signal path subjecting a transmission signal to distortion comprising: means for extracting a part of the transmission signal in said signal path to supply first and second portions of the same; squaring means for operating on said first portion of the extracted transmission signal to produce a second order output signal; filtering means connected to receive said second order output signal, said filtering means passing the second order harmonic frequencies of said transmission signal while blocking the fundamental frequency components of said transmission signal; delaying means for introducing a propagation delay to said second portion of the extracted transmission signal; multiplier means connected to receive the output of said filtering means and the delayed second portion of the extracted signal, said multiplier means comprising a balanced configuration of back diodes connected in a quad ring, said back diodes multiplying together the signals applied to said multiplier means to produce a third order output signal; means for delaying the transmission signal in said signal path an interval corresponding to the propagation delay of the extracted transmission signal in traversing its signal path to produce said third order output signal; means for adjustably controlling the phase and amplitude of said third order output signal to provide a compensating signal having a complementary phase relationship with and an amplitude substantially equal to the third order distortion effects introduced to said transmission signal by said signal path; and means for coupling the compensating signal to the delayed transmission signal of said signal path to substantially eliminate said third order distortion effects introduced by said signal path to produce an output transmission signal virtually free of same.
Claim 7
Dependent Claim 278 words
A distortion compensating circuit for a signal path subjecting a transmission signal to distortion comprising: means for extracting a part of the transmission signal in said signal path to supply first and second portions of the same; squaring means for operating on said first portion of the extracted transmission signal to produce a second order output signal; filtering means connected to receive said second order output signal, said filtering means passing the second order harmonic frequencies of said transmission signal while blocking the fundamental frequency components of said transmission signal; delaying means for introducing a propagation delay to said second portion of the extracted transmission signal; multiplier means connected to receive the output of said filtering means and the delayed second portion of the extracted signal, said multiplier means comprising a balanced configuration of back diodes connected in a quad ring, said back diodes multiplying together the signals applied to said multiplier means to produce a third order output signal; means for delaying the transmission signal in said signal path an interval corresponding to the propagation delay of the extracted transmission signal in traversing its signal path to produce said third order output signal; means for adjustably controlling the phase and amplitude of said third order output signal to provide a compensating signal having a complementary phase relationship with and an amplitude substantially equal to the third order distortion effects introduced to said transmission signal by said signal path; and means for coupling the compensating signal to the delayed transmission signal of said signal path to substantially eliminate said third order distortion effects introduced by said signal path to produce an output transmission signal virtually free of same.

References Cited (Backward Citations)

US3231819A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-07-22 1978-01-21 1978-07-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-07-22 1982-01-21 1982-07-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-07-22 1986-01-21 1986-07-23 $7700.00 Window Closed / Lapsed

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