Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
118 words
In combination, a multi-stage counter, the stages of said counter being normally monostable devices and of time constant of the order of 30 microseconds, means for selectively transforming any of said stages to a bistable device, means for at will controlling the time of transfer of said devices when bistable, means responsive to actuation of a first control device for initiating a complete count of said counter from the first stage of said counter through to a terminal stage of said counter, and means responsive to actuation of a further control device during a count for initiating a further count of said counter from said first stage to said terminal stage without interrupting the first referred to count.
Claim 2
Dependent Claim
118 words
In combination, a multi-stage counter, the stages of said counter being normally monostable devices and of time constant of the order of 30 microseconds, means for selectively transforming any of said stages to a bistable device, means for at will controlling the time of transfer of said devices when bistable, means responsive to actuation of a first control device for initiating a complete count of said counter from the first stage of said counter through to a terminal stage of said counter, and means responsive to actuation of a further control device during a count for initiating a further count of said counter from said first stage to said terminal stage without interrupting the first referred to count.
Claim 3
Dependent Claim
21 words
The combination according to claim 1, wherein said terminal stage is said first stage and said counter is an up-down counter.
Claim 4
Dependent Claim
30 words
The combination according to claim 2, wherein is included means responsive to actuation of said further control for reversing the direction of count of said counter from down to up.
Claim 5
Dependent Claim
80 words
The combination according to claim 3, wherein said counter includes stages two to n, wherein n is the ultimate stage of said counter, wherein each of the included stages has a normal state, and means for providing an up transfer pulse to the next higher stage and a down transfer pulse to the next lower stage on each reset of said included stages, and means for selectively inhibiting the up and the down transfer pulses of all said stages simultaneously.
Claim 6
Dependent Claim
84 words
In combination, a multi-stage assynchronous counter, a clock, the stages of said counter being normally monostable devices having predetermined time constants, set input and a time delayed reset output means responsive to the reset condition of each stage of said counter for automatically transferring a set pulse to at least one adjacent stage of said counter, voltage responsive means for at will converting any selected ones of said stages to bistable stages, and means responsive only to said clock for resetting said bistable stages.
Claim 7
Dependent Claim
84 words
In combination, a multi-stage assynchronous counter, a clock, the stages of said counter being normally monostable devices having predetermined time constants, set input and a time delayed reset output means responsive to the reset condition of each stage of said counter for automatically transferring a set pulse to at least one adjacent stage of said counter, voltage responsive means for at will converting any selected ones of said stages to bistable stages, and means responsive only to said clock for resetting said bistable stages.
Claim 8
Dependent Claim
13 words
The combination according to claim 5, wherein said counter is an up-down counter.
Claim 9
Dependent Claim
30 words
The combination according to claim 6, wherein means is provided for automatically initiating a down count of said counter in response to completion of an up count of said counter.
Claim 10
Dependent Claim
25 words
The combination according to claim 7, wherein means is provided for initiating an up count of said counter during said down count of said counter.
Claim 11
Dependent Claim
25 words
The combination according to claim 5, wherein means is provided for initiating a complete further count of said counter during a count of said counter.
Claim 12
Dependent Claim
24 words
The combination according to claim 5, wherein said clock is normally inoperative, and wherein is provided means for at will rendering said clock operative.
Claim 13
Dependent Claim
31 words
The combination according to claim 5, wherein said counter is arranged to complete its up count in response to application of a triggering pulse to an initial stage of said counter.
Claim 14
Dependent Claim
26 words
The combination according to claim 6, including control voltage responsive means for selectively conditioning said up-down counter as an up counter and as a down counter.
Claim 15
Dependent Claim
35 words
The combination according to claim 12, wherein means is provided for supplying said control voltage in response to completion of an up count of said counter to condition said counter to become a down counter.
Claim 16
Dependent Claim
33 words
The combination according to claim 5, wherein means is provided responsive to completion of a count of said counter for setting said counter in condition for a further complete count of said counter.
Claim 17
Dependent Claim
38 words
The combination according to claim 5, wherein means is provided for terminating operation of said counter upon completion of an up count of said counter, and voltage responsive means for initiating a further up count of said counter.
Claim 18
Dependent Claim
30 words
The combination according to claim 6, wherein voltage responsive means is provided for at will reversing the direction of count of said counter during a down count of said counter.
Claim 19
Dependent Claim
34 words
The combination according to claim 6, wherein means is provided for at will commencing a further count of said counter during count of said counter without interrupting said last mentioned count of said counter.
Claim 20
Dependent Claim
40 words
The combination according to claim 6, wherein each of said stages on reset transfers a set pulse to the next preceding and the next succeeding stage of said counter, and means for inhibiting one of said last named set pulses.
Claim 21
Dependent Claim
26 words
The combination according to claim 6, wherein means is provided for initiating each complete count of said counter only as an up count of said counter.