← Back to Patent Explorer
US3821092A Expired / Lapsed US ⏱️ 0.0 years remaining

Charge storage target and method of manufacture

Assignee: Westinghouse Electric Corp
•
Filing: 1972-10-11
•
Granted: 1974-06-28
•
Expires: 1992-10-11
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A charge storage device of the type in which a target electrode provides a plurality of spatially distributed charge storage sites formed on an output side of semiconductor wafer with means associated with the storage sites for sensing and converting the charge on the storage sites into an electrical signal. Input excitation is directed onto the other or input side of the semiconductor wafer and may be in the form of electrons or light capable of generating electron-hole pairs within the semiconductor wafer which diffuse through to the storage sites. The output side of the semiconductor wafer is provided with an apertures insulating layer with a reading electron beam making contact through the apertures in the insulating coating to the spatially distributed storage sites within these apertures. This invention is directed to an improvement in the structure and the process for manufacture thereof wherein pillars of the semiconductive wafer extend from the substrate of the wafer above the insulating layer and a semiconductive region of opposite type conductivity to that of the wafer is provided in the top of the pillar and an electrical conductive contact is provided on the top of said pillar for better electron beam contact to the target. The invention is directed to this structure and the process of fabricating the electrical contact onto the top of the pillar. The process includes the spinning of a resist coating over the pillared surface of the target in such a manner to provide a desired resist pattern for the manufacturing process and thereby avoids other difficult masking process steps.

Inventors

  • 👤 W Frobenius

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 19:08
CPC Classifications
H; H01; H01J; H01J29/00; H01J29/02; H01J29/10; H01J29/36; H01J29/39; H01J29/44; H01J9/00; H01J9/20; H01J9/233; H10; H10D; H10D99/00

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 22 words
The method set forth in claim 1 in which the target is rotated at a speed of about 3,500 rpm per minute.
Claim 2
Dependent Claim 33 words
The method set forth in claim 1 in which said pillar-like members have a top surface meeting the sides of said pillar-like member with a radius of curvature of less than one micron.
Claim 3
Dependent Claim 25 words
The method set forth in claim 1 in which the thickness of said resist coating is less than one-third the height of said pillar-like members.
Claim 4
Independent Claim 305 words
A method of fabricating a semiconductive charged storage target comprising the steps of: forming an etch mask comprised of a plurality of island members on one surface of a semiconductive wafer, treating said surface of said wafer with an etchant through said etch mask to etch away a portion of said wafer between and beneath a portion of said island members to provide a plurality of pillar-like extension members extending from the substrate of said wafer and each of said pillar-like members supporting an island member, removing said etch mask from said wafer, oxidizing the etch surface of said mesa type surface to passivate said surface, depositing a resist material on said mesa-like surface, rotating said target to distribute said resist material over said mesa-like surface to cover substantially the entire mesa-like surface other than an upper peripheral edge region on each of said pillar-like members, treating the resist-coated surface with an etch to which said oxide coating is more susceptible than said resist coating so as to remove the exposed oxide coating and also attack and remove the oxide coating from the top of said pillar-like member and at least a portion of the sides of said pillar-like member, forming a PN junction within each of said pillar-like members, depositing an electrical conductive pilot layer over said mesa type surface, depositing a resist solution over said electrical conductive pilot layer by spinning said target in a manner to provide a resist coating over the mesa-type surface other than an upper peripheral edge region on each of said pillar-like members and electroplating an electrical conductive contact onto the upper surface of each of said pillar-like members of a larger area than the cross-section of said pillars, and thereafter etching away the photoresist and pilot conductive layer from atop the insulating layer between the mesa portions.
Claim 5
Dependent Claim 19 words
The method set forth in claim 5 in which said etch mask is an oxide of the semiconductive material.
Claim 6
Dependent Claim 203 words
A mesa type diode array target comprising a semiconductive substrate, spaced apart diode junction mesa portions on one surface of the substrate, and an enlarged conductive metal contact cap disposed on the extending end of each diode junction mesa, which conductive metal contact cap covers the entire extending end portIon of the diode junction mesa and also extends in a direction normal to the mesa projection and is closely spaced from adjacent contact caps, which contact cap is electrodeposited by the process in which an insulating layer is provided on the semiconductive surface between the mesa portions, and a thin conductive metal pilot layer is deposited atop the mesa portion side of the substrate said thin conductive metal pilot layer covering the mesa portion and the insulating layer between the mesa portions, selectively depositing a photoresist coating over portions of the thin conductive metal pilot layer with the peripheral edge of the mesa between the end wall and the side wall of the mesa is free of photoresist coating, to expose the pilot conductive coating thereat, and electrodepositing the enlarged conductive metal contact cap, and thereafter etching away the photoresist and pilot conductive layers from atop the insulating layer between the mesa portions.
Claim 7
Dependent Claim 36 words
The device specified in claim 7, wherein said selective deposition of photoresist coating is carried out by depositing the resist over the mesa portion side of the substrate and spinning the substrate about its vertical axis.
Claim 8
Dependent Claim 12 words
The device specified in claim 7, wherein the contact cap is gold.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-06-27 1977-12-27 1978-06-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-06-27 1981-12-27 1982-06-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-06-27 1985-12-27 1986-06-28 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag