Patent US349572A successfully refreshed from Google Patents.
US3818482A
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US
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Character display system
Assignee: Panasonic Holdings Corp
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Filing: 1972-07-24
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Granted: 1974-06-18
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Expires: 1992-07-24
Abstract
Abstract A character display system of multi-rows and multi-columns comprising a first and a second memory for achieving repeated reading in the character display process, and means for inserting or erasing a character or characters in the information transfer between the first and the second memory or in editing the information in the first memory. Said means includes a shift register which can be inserted and disconnected from the recirculation loop of the data. The character display system has a function of arbitrary deletion or insertion of a character or characters in the display image plane.
Inventors
- 👤 T Yoshida
- 👤 K Okamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 13:43
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/22; G09G5/222; G06; G06F; G06F3/00; G06F3/01; G06F3/02; G09G1/00; G09G1/02
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
415 words
In a character display system having a scanning cathode ray tube display for displaying M X N characters and a plurality of storage units coupled with said cathode ray tube display for storing characters to be displayed, the improvement including an editing apparatus for inserting and removing characters to and from said storage units, comprising: first memory means for storing (M - 1) X N bits of information; second memory means for storing N bits of information; a first data transfer path coupling said first and second memory means together; third memory means for storing a single bit of information; first switching means for switching said third memory means into and out of said first data transfer path in a predetermined manner; fourth memory means for storing N bits of information; second switching means for switching said fourth memory means into and out of said first data transfer path in a prdetermined manner; a second, recirculation, data transfer path for transferring data from the output of said first memory means to the input of said first memory means; third switching means for switching the output of said first memory means between said first and second data transfer paths in a predetermined manner; means generating an external clock signal having a predetermined timing relationship with a scan control signal Of said scanning cathode ray tube display; means coupling said clock signal generating means to said first, second and third switching means, respectively, to control the circulation of information stored in said memories in synchronization with said external clock signal; an address counter coupled to said external clock signal generating means during a normal chracter display for monitoring the address of M X N bits of information; means for detecting the first and last information bits in a given data display row and the first and last information bits in a given data display page in accordance with the content of said address counter, the output of said detecting means being coupled to at least one of said switching means to switch at least one of said memory means between said first and second data transfer paths; a curser counter having the same capacity as said address counter and including means coupled to said address counter to arbitrarily set the contents of said address counter by an external control signal; and control means applying an additional clock signal to at least a portion of said memories to control insertion and deletion of information stored in said memories.
Claim 2
Dependent Claim
415 words
In a character display system having a scanning cathode ray tube display for displaying M X N characters and a plurality of storage units coupled with said cathode ray tube display for storing characters to be displayed, the improvement including an editing apparatus for inserting and removing characters to and from said storage units, comprising: first memory means for storing (M - 1) X N bits of information; second memory means for storing N bits of information; a first data transfer path coupling said first and second memory means together; third memory means for storing a single bit of information; first switching means for switching said third memory means into and out of said first data transfer path in a predetermined manner; fourth memory means for storing N bits of information; second switching means for switching said fourth memory means into and out of said first data transfer path in a prdetermined manner; a second, recirculation, data transfer path for transferring data from the output of said first memory means to the input of said first memory means; third switching means for switching the output of said first memory means between said first and second data transfer paths in a predetermined manner; means generating an external clock signal having a predetermined timing relationship with a scan control signal Of said scanning cathode ray tube display; means coupling said clock signal generating means to said first, second and third switching means, respectively, to control the circulation of information stored in said memories in synchronization with said external clock signal; an address counter coupled to said external clock signal generating means during a normal chracter display for monitoring the address of M X N bits of information; means for detecting the first and last information bits in a given data display row and the first and last information bits in a given data display page in accordance with the content of said address counter, the output of said detecting means being coupled to at least one of said switching means to switch at least one of said memory means between said first and second data transfer paths; a curser counter having the same capacity as said address counter and including means coupled to said address counter to arbitrarily set the contents of said address counter by an external control signal; and control means applying an additional clock signal to at least a portion of said memories to control insertion and deletion of information stored in said memories.
Claim 3
Dependent Claim
96 words
A character display system according to claim 1 capable of deleting a character, further comrising: means for inserting said third memory in the transfer path between said first and said second memory before the transfer of the information of that row from said first to said second memory which includes a character to be deleted; and means for detecting the entry of the character information to be deleted into said third memory, then disconnecting said third memory from the transfer path between said first and second memories, and directly connecing said first and said second memories.
Claim 4
Dependent Claim
71 words
A character display system according to claim 2, wherein said control means comprises: means for applying to said second memory only one more clock pulse than those of a regular number after the complete character information of that row in which a desired character is deleted has been transferred to said second memory, whereby the blank generated by the deletion of a character is disposed at the end of said row.
Claim 5
Dependent Claim
79 words
A character display system according to claim 2, wherein said control means comprises: means for applying one more clock pulse than those of a regular number to said first and said second memories after the complete character information of the Mth row of a display image in which a desired character is deleted has been transferred to said second memory, whereby the blank generated by the deletion of a character is disposed at the end of the image plane.
Claim 6
Dependent Claim
94 words
A character display system according to claim 1, capable of inserting a character at an arbitrary position, further comprising: means supplying the character information to be inserted to said third memory for storing the supplied information of one character bit; and wherein said first switching means includes means for inserting said third memory in the first data transfer path from the first to the second memory during the time that information of that line which includes the portion for insertion is transferred and immediately before the character information at said insertion position is transferred.
Claim 7
Dependent Claim
58 words
A character display system according to claim 5, capable of deleting the character at the end of the line in which a character is inserted, further comprising: means for disconnecting said third memory from said first transfer path after all bits but one of the character information of said line have been transferred out of said first memory.
Claim 8
Dependent Claim
59 words
A character display system according to claim 5, further comprising: means for disconnecting said third memory from said transfer path after all bits but one of the character information of the last row of a display image have been transferred out of said first memory, thereby the system being capable of deleting the last character of said display image.
Claim 9
Dependent Claim
116 words
A Character display system according to claim 1, further comprising: means for serially connecting said first and said second memories; means coupled to said third switching means for switching said first memory from said first to said second data transfer path at the moment the character information of the row to be deleted is transferred to said second memory; means for writing blank information into said second memory to erase the character informaton of the row to be deleted stored therein; and means switching said first memory from said second back to said first data transfer path just before the character information of the next row after the deleted row is transferred from said first memory.
Claim 10
Dependent Claim
95 words
A character display system according to claim 1, said second switching means further comprising: means for inserting said fourth memory in the data transfer path from said second to said first memory after the character information of a row in which a new line of character information is to be inserted is transferred from said first to said second memory; and means for disconnecting said fourth memory from the transfer path from said second to said first memory at the moment when the character information of the first row is transferred to said second memory.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-06-17 | 1977-12-17 | 1978-06-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-06-17 | 1981-12-17 | 1982-06-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-06-17 | 1985-12-17 | 1986-06-18 | $7700.00 | Window Closed / Lapsed |