US3818441A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Key input circuit system for electronic apparatus
Assignee: Hitachi Ltd
•
Filing: 1972-10-10
•
Granted: 1974-06-18
•
Expires: 1992-10-10
Abstract
Abstract A novel key input circuit used for electronic apparatus and having a plurality of push-button switches which are operated so as to produce desired information to be fed as an input to the electronic apparatus. The key input circuit comprises a timing pulse generating section, a key switch section having a plurality of key switches, a key input signal gating section, an encoder section, a start pulse generating section and a key input reading section. The sections are so arranged and designed that the occurrence of erroneous signals fed as input signals may be precluded for attaining the enhanced speed of key switch operation even when more than two key switches are operated simultaneously or consecutively.
Inventors
- 👤 K Nomiya
- 👤 T Tsuiki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 11:34
CPC Classifications
G; G06; G06F; G06F3/00; G06F3/01; G06F3/02; G06F3/023; H; H03; H03M; H03M11/00; H03M11/20
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
191 words
A key input circuit comprising timing pulse generating means for providing a plurality of pulse outputs of different pulse phases from respective output terminals, a key switch section consisting of a plurality of key switches each having one terminal connected to a corresponding one of said output terminals of said timing pulse generating means and the other terminal connected commonly to the like terminals of the other key swiTches, key input signal gating means for controllably passing key input signals under the control of the outputs of said timing pulse generating section and the output of said key switch section, encoder means connected to the output of said key input signal gating means for converting said output into a corresponding binary signal, start pulse generating means for producing a start pulse output on the basis of the output of said key switch section, and key input reading means connected to the output of said encoder means and to the output of said start pulse generating means for selectively transferring the output of said encoder means to respective outgoing terminals under the control of the output of said start pulse generating means.
Claim 2
Dependent Claim
191 words
A key input circuit comprising timing pulse generating means for providing a plurality of pulse outputs of different pulse phases from respective output terminals, a key switch section consisting of a plurality of key switches each having one terminal connected to a corresponding one of said output terminals of said timing pulse generating means and the other terminal connected commonly to the like terminals of the other key swiTches, key input signal gating means for controllably passing key input signals under the control of the outputs of said timing pulse generating section and the output of said key switch section, encoder means connected to the output of said key input signal gating means for converting said output into a corresponding binary signal, start pulse generating means for producing a start pulse output on the basis of the output of said key switch section, and key input reading means connected to the output of said encoder means and to the output of said start pulse generating means for selectively transferring the output of said encoder means to respective outgoing terminals under the control of the output of said start pulse generating means.
Claim 3
Dependent Claim
38 words
A key input circuit as defined in claim 1, wherein said timing pulse generating means is provided in the form of a ring counter generating a plurality of sequential pulse outputs on respective lines to said output terminals.
Claim 4
Dependent Claim
54 words
A key input circuit as defined in claim 2, wherein said key input signal gating means includes a plurality of AND gates each having one terminal connected to the common connection of said key switches and a second terminal connected to a respective one of the output terminals of said timing pulse generating means.
Claim 5
Dependent Claim
69 words
A key input circuit as defined in claim 3, wherein said start pulse generating means includes a first flip-flop connected to said common connection of said key switches, a second flip-flop connected to the output of said first flip-flop, and an AND gate having one input connected to the output of said first flip-flop and a second input connected to the output of said second flip-flop through an inverter.
Claim 6
Dependent Claim
54 words
A key input circuit as defined in claim 2, wherein said ring counter sequential applies a polarity signal to otherwise normally grounded lines connected to said output terminals so that a ground potential pulse output will appear at said common connection of said key switches when two or more key switches are simultaneously operated.
Claim 7
Dependent Claim
42 words
A key input circuit as defined in claim 1, wherein at least said timing pulse generating means, said key input signal gating means, said encoder means and said start pulse generating means are provided in the form of a semiconductor integrated circuit.
Claim 8
Dependent Claim
33 words
A key input circuit as defined in claim 1, wherein a plurality of indicating devices are connected individually to respective output terminals of said timing pulse generating means via respective semiconductor control devices.
Claim 9
Dependent Claim
26 words
A key input circuit as defined in claim 1, wherein a noise prevention resistor is connected between said common connection of said key switches and ground.
Claim 10
Dependent Claim
74 words
In a key input circuit including a plurality of key switches and means to couple timing pulses of different phases to one end of said respective key switches, the improvement comprising diodes connected in series with said respective key switches, means to couple pulse signals passed through respective ones of said key switches to a common terminal, and means to ground said common terminal when the state of said plurality of timing pulses changes.
Claim 11
Dependent Claim
74 words
In a key input circuit including a plurality of key switches and means to couple timing pulses of different phases to one end of said respective key switches, the improvement comprising diodes connected in series with said respective key switches, means to couple pulse signals passed through respective ones of said key switches to a common terminal, and means to ground said common terminal when the state of said plurality of timing pulses changes.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-06-17 | 1977-12-17 | 1978-06-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-06-17 | 1981-12-17 | 1982-06-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-06-17 | 1985-12-17 | 1986-06-18 | $7700.00 | Window Closed / Lapsed |