US3818244A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Limiters for noise reduction systems
Assignee: Dolley Laboratories Inc
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Filing: 1973-03-06
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Granted: 1974-06-18
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Expires: 1993-03-06
Abstract
Abstract Limiters are known utilizing a shunt FET rendered conductive by a smoothed control signal to attenuate a signal. In this invention distortion is reduced by effecting positive feedback of half of the FET output voltage via a control signal smoothing capacitor or by putting the FET across a balanced line on the output side of a phase splitter. Furthermore, by using two or more shunt FETs having different thresholds, better control of the attenuation characteristics over the whole dynamic range is possible.
Inventors
- 👤 R Dolby
- 👤 D Robinson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:25
CPC Classifications
H; H03; H03G; H03G11/00; H03G11/04; H03G7/00; H03G7/06
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
91 words
A limiter circuit comprising an input, an output, and a control terminal, a signal path extending from the input to the output and including a plurality of series impedances, a plurality of field effect transistors having source-drain circuits shunting the signal path and gates connected to the control terminal for control, by a control voltage, of the attenuation introduced by the transistors, the transistors following the series impedances respectively and the circuit being constructed and arranged to establish different thresholds of the control voltage at which the transistors start to conduct.
Claim 2
Dependent Claim
91 words
A limiter circuit comprising an input, an output, and a control terminal, a signal path extending from the input to the output and including a plurality of series impedances, a plurality of field effect transistors having source-drain circuits shunting the signal path and gates connected to the control terminal for control, by a control voltage, of the attenuation introduced by the transistors, the transistors following the series impedances respectively and the circuit being constructed and arranged to establish different thresholds of the control voltage at which the transistors start to conduct.
Claim 3
Dependent Claim
21 words
A limiter circuit according to claim 1, comprising means establishing bias voltage differences between the gates to provide the different thresholds.
Claim 4
Dependent Claim
32 words
A limiter circuit according to claim 1, wherein the thresholds are ordered whereby the transistors start conducting in order, starting from that nearest the input, in response to an increasing control voltage.
Claim 5
Dependent Claim
13 words
A limiter circuit according to claim 1, wherein there are only two transistors.
Claim 6
Dependent Claim
35 words
A limiter circuit according to claim 1, wherein the signal path includes a phase splitter connected to the limiter input, at least the transistor nearest the limiter input shunting the output of the phase splitter.
References Cited (Backward Citations)
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US3482174A
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US3525880A
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US3502903A
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US3538320A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-06-17 | 1977-12-17 | 1978-06-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-06-17 | 1981-12-17 | 1982-06-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-06-17 | 1985-12-17 | 1986-06-18 | $7700.00 | Window Closed / Lapsed |