Control circuit for preventing rapid recycling in automatic systems

Claim 2

In a recycling pumpdown cooling system including an evaporator, a condenser, a compressor for selectively pumping refrigerant from the evaporator to the condensor to recirculate refrigerant through the system during cooling cycles and to keep refrigerant from accumulating in the evaporator between cooling cycles, a refrigerant line including valve means for returning refrigerant from the condenser to the evaporator when the valve means is open, valve control means for opening the valve means in response to a signal indicating that cooling is required, and compressor control means actuated by refrigerant pressure in said system for controlling the pumping operation of the compressor, a control circuit for preventing operation of said system for a predetermined interval of time following completion of a compressor pumping operation comprising: first bistable circuit means having stable set and reset states, said first bistable circuit means being initially reset; second bistable circuit means responsive tO the compressor control means and to said first bistable circuit means, and having stable set and reset states for enabling the compressor when set, said second bistable circuit means being reset when said compressor control means is not actuated and being enabled to change from the reset state to the set state in response to the actuation of the compressor control means when said first bistable circuit means is set; and first timing circuit means responsive to the operation of the compressor for setting said first bistable circuit means a predetermined first time interval after the completion of a compressor pumping operation.

Claim 3

The apparatus defined in claim 1 wherein said first timing circuit means comprises means responsive to said second bistable circuit means for setting said first bistable circuit means said predetermined first time interval after the resetting of said second bistable circuit means.

Claim 4

The apparatus defined in claim 1 wherein said control circuit further comprises reset circuit means responsive to the initiation of a compressor pumping operation for resetting said first bistable circuit means.

Claim 5

The apparatus defined in claim 1 wherein said control circuit further comprises reset circuit means responsive to the setting of said second bistable circuit means for resetting said first bistable circuit means.

Claim 6

The apparatus defined in claim 1 wherein said second bistable circuit means includes means for delaying the initiation of a compressor pumping operation for a predetermined second time interval after actuation of the compressor control means.

Claim 7

The apparatus defined in claim 1 wherein said second bistable circuit means comprises: third bistable circuit means responsive to the compressor control means and having stable set and reset states for enabling the compressor when set, said third bistable circuit means being reset when said compressor control means is not actuated; and second timing circuit means responsive to the compressor control means and said first bistable circuit means for setting said third bistable circuit means a predetermined second time interval after actuation of the compressor control means, said second timing circuit means being enabled when said first bistable circuit means is set.

Claim 8

The apparatus defined in claim 1 wherein said control circuit further comprises means responsive to said first bistable circuit means for enabling the valve control means when said first bistable circuit means is set.

Claim 9

The apparatus defined in claim 3 wherein said control circuit further comprises: first means responsive to said first bistable circuit means for enabling the valve control means when said first bistable circuit means is set; and second means responsive to said second bistable circuit means for enabling the valve control means when said second bistable circuit means is set.

Claim 10

The apparatus defined in claim 1 wherein said control circuit further comprises a source of control current and wherein said first timing circuit means comprises: a first capacitor; a first resistor connected in series between said first capacitor and said source of control current for charging said first capacitor with said control current; and first threshold detection means responsive to the potential across said first capacitor for producing an output signal for setting said first bistable circuit means when the potential across said first capacitor reaches a predetermined threshold level.

Claim 11

The apparatus defined in claim 9 wherein said first timing circuit means further comprises means responsive to the operation of the compressor for discharging said first capacitor while the compressor is operating.

Claim 12

The apparatus defined in claim 2 wherein said control circuit further comprises a source of control current and wherein said first timing circuit means comprises: a first capacitor; a first resistor connected in series between said first capacitor and said source of Control current for charging said first capacitor with said control current; and first threshold detection means responsive to the potential across said first capacitor for producing an output signal for setting said first bistable circuit means when the potential across said first capacitor reaches a predetermined threshold level.

Claim 13

The apparatus defined in claim 11 wherein said first timing circuit means further comprises means responsive to said second bistable circuit means for discharging said first capacitor while said second bistable circuit means is set.

Claim 14

The apparatus defined in claim 6 wherein said control circuit further comprises a source of control current and wherein said second timing circuit means comprises: a second capacitor; a second resistor connected in series between said second capacitor and said source of control current for charging said second capacitor with said control current; and second threshold detection means responsive to the potential across said second capacitor for producing an output signal for setting said second bistable circuit means when the potential across said second capacitor reaches a predetermined threshold level.

Claim 15

The apparatus defined in claim 13 wherein said second timing circuit means further comprises means responsive to said first bistable circuit means for discharging said second capacitor while said first bistable circuit means is reset.

Claim 16

In a recycling pumpdown cooling system including an evaporator, a condenser, a compressor for selectively pumping refrigerant from the evaporator to the condensor to recirculate refrigerant through the system during cooling cycles and to keep refrigerant from accumulating in the evaporator between cooling cycles, a refrigerant line including a normally closed valve for returning refrigerant from the condenser to the evaporator when the valve is open, compressor control means actuated by refrigerant pressure in said system for controlling the pumping operation of the compressor, and valve control means for opening the normally closed valve in response to a signal indicating that cooling is required, a control circuit for preventing operation of said system for a predetermined interval of time following completion of a compressor pumping operation comprising: first bistable circuit means having stable set and reset states for enabling the valve control means when set, said first bistable circuit being initially reset; second bistable circuit means responsive to the compressor control means and having stable set and reset states for enabling the valve control means and the compressor when set, said second bistable circuit means being reset when the compressor control means is not actuated; first timing circuit means responsive to said second bistable circuit means for setting said first bistable circuit means a first predetermined time interval after the resetting of said second bistable circuit means; second timing circuit means responsive to the compressor control means and said first bistable circuit means for setting said second bistable circuit means a second predetermined time interval after actuation of the compressor control means when enabled by said first bistable circuit means, said second timing circuit means being enabled when said first bistable circuit is set; and reset circuit means responsive to the setting of said second bistable circuit means for resetting said first bistable circuit means.

Claim 17

In a recycling pumpdown cooling system including an evaporator, a condenser, a compressor for selectively pumping refrigerant from the evaporator to the condensor to recirculate refrigerant through the system during cooling cycles and to keep refrigerant from accumulating in the evaporator between cooling cycles, a refrigerant line including a normally closed valve for returning refrigerant from the condenser to the evaporator when the valve is open, compressor control means actuated by refrigerant pressure in said system for controlling the pumping operation of the compressor, and valve control means for opening the normally closed valve in response to a signal indicating that cooling is required, a control circuit for preventing operation of said system for a predetermined interval of time following completion of a compressor pumping operation comprising: first bistable circuit means having stable set and reset states for enabling the valve control means when set, said first bistable circuit being initially reset; second bistable circuit means responsive to the compressor control means and having stable set and reset states for enabling the valve control means and the compressor when set, said second bistable circuit means being reset when the compressor control means is not actuated; first timing circuit means responsive to said second bistable circuit means for setting said first bistable circuit means a first predetermined time interval after the resetting of said second bistable circuit means; second timing circuit means responsive to the compressor control means and said first bistable circuit means for setting said second bistable circuit means a second predetermined time interval after actuation of the compressor control means when enabled by said first bistable circuit means, said second timing circuit means being enabled when said first bistable circuit is set; and reset circuit means responsive to the setting of said second bistable circuit means for resetting said first bistable circuit means.

Claim 18

The apparatus defined in claim 15 wherein said control circuit further comprises a source of control current and wherein said first bistable circuit means comprises a first relay having normally open contacts for enabling the valve control means when closed and a first silicon controlled rectifier device, the coil of said first relay being connected in series between said source of control current and the anode of said first silicon controlled rectifier device and the cathode of said first silicon controlled rectifieR device being connected to ground.

Claim 19

The apparatus defined in claim 16 wherein the compressor control means includes a second relay having normally open contacts for enabling the compressor when closed and a switch having first and second terminals and contacts for completing a circuit between the first and second terminals when the compressor control means is actuated and wherein said second bistable circuit means comprises a second silicon controlled rectifier device, the coil of the relay being connected in series between said source of control current and the first terminal of the switch, the second terminal of the switch being connected to the anode of said second silicon controlled rectifier device, and the cathode of said second silicon controlled rectifier device being connected to ground.

Claim 20

The apparatus defined in claim 17 wherein said first timing circuit comprises: a first capacitor; a first resistor connected in series between said first capacitor and the coil of said first relay for charging said first capacitor with current flowing from the source of control current through the coil of said first relay; and first threshold detection means responsive to the potential across said first capacitor for producing an output signal applied to the gate of said first silicon controlled rectifier device for causing said first silicon controlled rectifier device to conduct when the potential across said first capacitor reaches a predetermined threshold level.

Claim 21

The apparatus defined in claim 18 wherein said first threshold detection means comprises: first and second serially connected voltage dividing resistors connected in parallel with said first resistor and said first capacitor; and a first programmable unijunction transistor device connected in parallel with said first capacitor by its anode and cathode, the gate of said first programmable unijunction transistor device being connected between said first and second voltage dividing resistors and the cathode of said first programmable unijunction transistor device being connected to the gate of said first silicon controlled rectifier device.

Claim 22

The apparatus defined in claim 19 wherein said first timing circuit means further comprises first means responsive to said second bistable circuit means for discharging said first capacitor while said second bistable circuit means is set.

Claim 23

The apparatus defined in claim 20 wherein said second timing circuit comprises: a second capacitor; a second resistor connected in series between said second capacitor and the second terminal of the switch for charging said second capacitor with current flowing from the source of control current through the contacts of the switch; and second threshold detection means responsive to the potential across said second capacitor for producing an output signal applied to the gate of said second silicon controlled rectifier device for causing said second silicon controlled rectifier device to conduct when the potential across said second capacitor reaches a predetermined threshold level.

Claim 24

The apparatus defined in claim 21 wherein said second threshold detection means comprises: third and fourth serially connected voltage dividing resistors connected in parallel with said second resistor and said second capacitor; and a second programmable unijunction transistor device connected in parallel with said second capacitor by its anode and cathode, the gate of said second programmable unijunction transistor device being connected between said third and fourth voltage dividing resistors and the cathode of said second programmable unijunction transistor device being connected to the gate of said second silicon controlled rectifier device.

Claim 25

The apparatus defined in claim 22 wherein said second timing circuit means further comprises second means responsive to said first bistable circuit means for discharging said second capacitor while said first bistable circuit means is resEt.

Claim 26

The apparatus defined in claim 23 wherein said second bistable circuit means further comprises a diode connected between the coil of said first relay and the first terminal of the switch for permitting current to flow from the coil to the switch.

Claim 27

The apparatus defined in claim 24 wherein said reset circuit means comprises a capacitor connected in series between the anode of said first silicon controlled rectifier device and the anode of said second silicon controlled rectifier device.

Claim 28

The apparatus defined in claim 25 wherein said control circuit further comprises a first flyback diode connected in parallel with the coils of said first and second relays, the cathode of said first flyback diode being connected to said source of control current.