US3815095A
Expired / Lapsed
US
⏱️ 0.0 years remaining
General-purpose array processor
Assignee: Texas Instruments Inc
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Filing: 1972-08-29
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Granted: 1974-06-04
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Expires: 1992-08-29
Abstract
Abstract A general-purpose array processor allows each processor to transfer its output to any other processor in the array. Each processor contains its own memory, address register, and input selection multiplexer whereby an address may be transferred from a processor memory to its address register; and the information in the address register is used by the selection multiplexer to select one input from all array processor outputs.
Inventors
- 👤 A Wester
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 16:56
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/76; G06F15/80; G06F15/8007; G06F15/8015
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
157 words
An array processor computer, said array processor computer having central control lines providing control and input data signals comprising: a. an array of processing elements, each receiving said central control lines for carrying out commands specified by said control signals on data provided by said input data signals; b. each of said processing elements including: 1 a random access memory for storing said input data, 2 an arithmetic unit having an input and an output for carrying out arithmetic operations on the data stored in said memory, 3 an address register for selecting one of said processing elements from which data is to be read, and 4 a multiplexer having inputs from its own arithmetic unit and from the arithmetic units of all of the other processing elements, said multiplexer being responsive to said address register for connecting the output of the arithmetic unit of the selected processing element to the input of its own arithmetic unit.
Claim 2
Dependent Claim
157 words
An array processor computer, said array processor computer having central control lines providing control and input data signals comprising: a. an array of processing elements, each receiving said central control lines for carrying out commands specified by said control signals on data provided by said input data signals; b. each of said processing elements including: 1 a random access memory for storing said input data, 2 an arithmetic unit having an input and an output for carrying out arithmetic operations on the data stored in said memory, 3 an address register for selecting one of said processing elements from which data is to be read, and 4 a multiplexer having inputs from its own arithmetic unit and from the arithmetic units of all of the other processing elements, said multiplexer being responsive to said address register for connecting the output of the arithmetic unit of the selected processing element to the input of its own arithmetic unit.
Claim 3
Dependent Claim
26 words
The array processor computer claimed in claim 1, each arithmetic unit of each processor including left/right shift registers serially interconnected to perform arithmetic and logical shifts.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-06-03 | 1977-12-03 | 1978-06-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-06-03 | 1981-12-03 | 1982-06-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-06-03 | 1985-12-03 | 1986-06-04 | $7700.00 | Window Closed / Lapsed |