Error detection system

Claim 1

In a data processing system including a first generator circuit for generating output signals in response to control circuitry which output signals represent a selected logic function of first and second input signals, a circuit for checking the operation of said first generator circuit comprising a. means for generating reference logic signals representing a reference logic function of said first and second input signals, b. residue generating means for generating first, second, third and fourth residue signals representing, respectively, the residues of said first and second input signals, the residue of said output signals and the residue of said reference logic signals, c. a residue manipulation circuit responsive to said residue generating means for generating a residue predictor signal, said manipulation circuit comprising 1. adder means for generating signals corresponding to the mod 3 addition function of said first and second residue signals, 2. second generator means responsive to said adder means and said reference logic residue signals for generating a plurality of constituent logic function signals, and 3. means responsive to said control circuitry for selecting one of said constituent logic function signals, and d. means for comparing said selected constituent logic function signal and said third residue signal and for generating a signal when said selected logic function signal and said third residue signal are not identical thereby to signal an error in said selected logic function signal.