US3812476A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Memory device
Assignee: Texas Instruments Inc
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Filing: 1973-09-13
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Granted: 1974-05-21
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Expires: 1993-09-13
Abstract
Abstract A memory device is disclosed. The memory device is comprised of a plurality of shift registers and a plurality of majority voters. The outputs of each of said shift registers are connected to the inputs of each of said majority voters.
Inventors
- 👤 H Cragon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 20:57
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/16; G06F11/18; G06F11/183; G06F11/184; G06F11/185
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
118 words
A memory device wholly contained on a single semiconductor slice comprising: means for writing data into said memory device; a plurality of register stages, each of said register stages having a plurality of redundant shift registers, said shift registers fabricated from charge coupled devices; means for connecting said register stages into a circular memory; a plurality of majority voting means; means connecting the outputs of each of said redundant shift registers to the inputs of each of said majority voting means; means connecting the output of each of said majority voting means in one stage to the input of one of said redundant shift registers in the succeeding stage; and means for reading information from said memory device.
Claim 2
Dependent Claim
118 words
A memory device wholly contained on a single semiconductor slice comprising: means for writing data into said memory device; a plurality of register stages, each of said register stages having a plurality of redundant shift registers, said shift registers fabricated from charge coupled devices; means for connecting said register stages into a circular memory; a plurality of majority voting means; means connecting the outputs of each of said redundant shift registers to the inputs of each of said majority voting means; means connecting the output of each of said majority voting means in one stage to the input of one of said redundant shift registers in the succeeding stage; and means for reading information from said memory device.
Claim 3
Dependent Claim
16 words
The memory device claimed in claim 1 wherein said majority voting means are metal-oxide semiconductor transistors.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-05-20 | 1977-11-19 | 1978-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-05-20 | 1981-11-19 | 1982-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-05-20 | 1985-11-19 | 1986-05-21 | $7700.00 | Window Closed / Lapsed |