US3812472A
Expired / Lapsed
US
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Noise rejecting,demand variable real time clock
Assignee: HAS MEDICAL Inc
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Filing: 1972-10-24
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Granted: 1974-05-21
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Expires: 1992-10-24
Abstract
Abstract Data acquisition units used with a computer, such as medical parameter input terminals, are sampled at 60 Hz as well as multiples and submultiples thereof, thereby to mitigate noise coupled to the input transmission lines from 60 Hz power lines and from fluorescent lighting. A 1920 Hz phase locked clock drives a frequency divider to provide signals at submultiples thereof (including 60 Hz as well as multiples and submultiples thereof), thereby providing a multi-frequency real time clock source for sampling data channels. However, instead of causing a computer interrupt for the highest sampling rate of the real time clock and determining whether or not any interrupt is to take place at that frequency, interrupts are caused only at the highest currently-demanded sampling rate a hardware embodiment includes programmable multiplexers to select the clock frequency related to the desired sampling rate for each channel, programmable countdown for the number of samplings required at each channel, and priority means to sample the channels one at a time in an orderly sequence, regardless of frequency or time of starting of the sampling, the ignoring those channels for which sampling is not required. This aspect of the invention may be implemented in software utilizing a general purpose computer or a multipurpose mini-computer.
Inventors
- 👤 J Mahood
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 20:03
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4812; G06F9/4825; A; A61; A61B; A61B5/00; A61B5/0002; A61B5/0004; A61B5/0006; G06F13/00; G06F13/14; G06F13/20; G06F13/24
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
205 words
In electronic data processing apparatus including a plurality of data input channels which may require service at random times as indicated by sample request signals generated therein and which provide data at a plurality of data sampling rates, a computer having input data sampling means for sampling data provided by said input channels at a rate significantly higher than any of said sampling rates, and a real time clock, the method of controlling computer interrupts for sampling data input channels, which comprises the steps of: a generating a plurality of distinct clock signals at different frequencies, said frequencies including a given frequency and multiples and sub-multiples of said given frequency and said frequencies relating to different sampling rates at which various ones of said data input channels are to be sampled; b registering sample request signals from one or more data channels; c in response to the concurrence of a registered sample request and one of said distinct clock signals at the frequency corresponding to the data sampling rate of the input channel related to the registered sample request, generating computer interrupt signals to cause said input sampling means of said computer to sample the data at the related one of said data input channels.
Claim 2
Dependent Claim
205 words
In electronic data processing apparatus including a plurality of data input channels which may require service at random times as indicated by sample request signals generated therein and which provide data at a plurality of data sampling rates, a computer having input data sampling means for sampling data provided by said input channels at a rate significantly higher than any of said sampling rates, and a real time clock, the method of controlling computer interrupts for sampling data input channels, which comprises the steps of: a generating a plurality of distinct clock signals at different frequencies, said frequencies including a given frequency and multiples and sub-multiples of said given frequency and said frequencies relating to different sampling rates at which various ones of said data input channels are to be sampled; b registering sample request signals from one or more data channels; c in response to the concurrence of a registered sample request and one of said distinct clock signals at the frequency corresponding to the data sampling rate of the input channel related to the registered sample request, generating computer interrupt signals to cause said input sampling means of said computer to sample the data at the related one of said data input channels.
Claim 3
Dependent Claim
73 words
The method according to claim 1 wherein said step (c) comprises: in response to registered sample requests for sampling two or more of said data input channels, generating electric signals defining an ordered sequence of generating computer interrupt signals in response to said registered sample requests concurrently with ones of said distinct clock signals relating to the data sampling rates of the data input channels for which the sample requests have been registered.
Claim 4
Dependent Claim
92 words
The method according to claim 1 comprising the additional steps of: registering, for each data input channel, the number of data samples required as a result of a single registered sample request; counting the number of said clock signals which occur at the frequency related to the data sampling rate of each of said channels for which a sample request is registered; and generating said interrupt signals for each of said channels repetitively until the number of said interrupt signals for each of said channels equals the registered number of required samples.
Claim 5
Dependent Claim
72 words
The method according to claim 1 wherein said real time clock includes a phase locked clock having a reference signal input, the output of said phase lock clock being connected to advance a frequency dividing counter, and wherein said step of generating clock signals comprises: applying a clock signal derived as an output of one of the stages of said counter as a reference signal for phase locking said phase locked clock.
Claim 6
Dependent Claim
72 words
The method according to claim 4 wherein said phase locked clock is driven by a 60 Hz power signal, said frequency dividing counter comprises a binary counter, and said applying step comprises applying the output of the Nth stage of said counter aS a phase reference to said reference input for phase locking said clock, whereby said clock produces signals to said counter which are two to the Nth times 60 Hz.
Claim 7
Dependent Claim
24 words
The method according to claim 1 wherein there is provided clock pulses at 60 Hz, multiples of 60 Hz, the submultiples of 60 Hz.
Claim 8
Dependent Claim
195 words
Electronic data processing apparatus comprising: a plurality of data input channels each of which may require service at random times, each indicating that service is required by issuing a sample demand signal, and at least some of which provide data at data sampling rates different from others thereof; a real time clock for generating a plurality of distinct clock signals at different frequencies, said frequencies including a given frequency and multiples and sub-multiples of said given frequency, said frequencies relating to different data sampling rates at which corresponding ones of said data input channels are to be sampled; and multi-function data processing means including input data sampling means for sampling data provided by said data input channels, and means for registering demands to sample the data of one or more of said data input channels and for generating, in response to the concurrence of a registered sample demand and one of said distinct clock signals at the frequency corresponding to the data sampling rate of the related data input channel, interrupt signals for indicating that a unit of data at the related data input channel is to be sampled by said input data sampling means.
Claim 9
Dependent Claim
195 words
Electronic data processing apparatus comprising: a plurality of data input channels each of which may require service at random times, each indicating that service is required by issuing a sample demand signal, and at least some of which provide data at data sampling rates different from others thereof; a real time clock for generating a plurality of distinct clock signals at different frequencies, said frequencies including a given frequency and multiples and sub-multiples of said given frequency, said frequencies relating to different data sampling rates at which corresponding ones of said data input channels are to be sampled; and multi-function data processing means including input data sampling means for sampling data provided by said data input channels, and means for registering demands to sample the data of one or more of said data input channels and for generating, in response to the concurrence of a registered sample demand and one of said distinct clock signals at the frequency corresponding to the data sampling rate of the related data input channel, interrupt signals for indicating that a unit of data at the related data input channel is to be sampled by said input data sampling means.
Claim 10
Dependent Claim
25 words
Apparatus according to claim 7 wherein said real time clock provides clock signals at 60 Hz, multiples of 60 Hz, and sub-multiples of 60 Hz.
Claim 11
Dependent Claim
77 words
Apparatus according to claim 7 wherein said multi-function data processing means includes means responsive to said real time clock and to said registering means for generating, in response to demands for sampling two or more said input channels, said computer interrupt signals in an ordered sequence in response concurrence of individual ones of said demands with ones of said distinct clock signals related to the data sampling rate of the data input channels corresponding to the demands.
Claim 12
Dependent Claim
55 words
Apparatus according to claim 7 wherein said real time clock includes a phase locked clock having a phase reference input and a frequency dividing counter, one of the stages of said counter being connected to the phase reference input of said phase locked clock as a reference signal for phase locking said phase locked clock.
Claim 13
Dependent Claim
65 words
Apparatus according to claim 10 wherein said phase locked clock is driven by a 60 Hz power signal, said frequency dividing counter comprises a binary counter, and the output of the Nth stage of said counter is connected to the phase reference input of said phase locked clock, whereby said clock produces signals to said counter which are two to the Nth times 60 Hz.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-05-20 | 1977-11-19 | 1978-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-05-20 | 1981-11-19 | 1982-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-05-20 | 1985-11-19 | 1986-05-21 | $7700.00 | Window Closed / Lapsed |