US3810235A
Expired / Lapsed
US
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Adaptive data readout timing arrangement
Assignee: AT&T Inc
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Filing: 1973-03-23
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Granted: 1974-05-07
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Expires: 1993-03-23
Abstract
Abstract Fixed and variable data bit position shifts in a memory system are compensated for by an adaptive readout strobe timing arrangement. One check bit transition per word is employed during readout to position the data bit stream relative to the recorded clock via an active shift register driven by an asynchronous external clock. The number of shift register cells through which each data word flows is determined digitally by a counter which measures the shift between the word check bit transition and a corresponding recorded clock bit.
Inventors
- 👤 J Hopkins
- 👤 R Townley
- 👤 L Zimmerman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 07:38
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/16
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
103 words
A method for adaptively controlling the timing of the strobing of serial data signals read out of a recording system using prerecorded strobing signals and using a single predetermined signal recorded with said data signals, comprising the steps of: 1. delaying said data signals, including said predetermined signal, a nominal period of time; 2. delaying said strobing signals a fixed period of time; 3. determining a digital representation of the timing relationship between said delayed predetermined signal and said delayed strobing signals; and 4. adjusting said data signal delay provided by step (1) in accordance with said digital representation determined in step (3).
Claim 2
Independent Claim
103 words
A method for adaptively controlling the timing of the strobing of serial data signals read out of a recording system using prerecorded strobing signals and using a single predetermined signal recorded with said data signals, comprising the steps of: 1. delaying said data signals, including said predetermined signal, a nominal period of time; 2. delaying said strobing signals a fixed period of time; 3. determining a digital representation of the timing relationship between said delayed predetermined signal and said delayed strobing signals; and 4. adjusting said data signal delay provided by step (1) in accordance with said digital representation determined in step (3).
Claim 3
Dependent Claim
9 words
delaying said strobing signals a fixed period of time;
Claim 4
Dependent Claim
9 words
delaying said strobing signals a fixed period of time;
Claim 5
Dependent Claim
42 words
A method according to claim 1 using a single predetermined signal recorded with each unit of data signals, further comprising the step of repeating steps (1) through (4) for each unit of said data signals and read out of said recording system.
Claim 6
Dependent Claim
21 words
A method according to claim 2 wherein said predetermined signal comprises a signal transition recorded preceding each unit of data signals.
Claim 7
Dependent Claim
19 words
determining a digital representation of the timing relationship between said delayed predetermined signal and said delayed strobing signals; and
Claim 8
Dependent Claim
19 words
determining a digital representation of the timing relationship between said delayed predetermined signal and said delayed strobing signals; and
Claim 9
Dependent Claim
19 words
adjusting said data signal delay provided by step (1) in accordance with said digital representation determined in step (3).
Claim 10
Dependent Claim
19 words
adjusting said data signal delay provided by step (1) in accordance with said digital representation determined in step (3).
Claim 11
Dependent Claim
22 words
A method according to claim 2 wherein said predetermined signal comprises a data signal transition recorded within each unit of data signals.
Claim 12
Dependent Claim
123 words
An adaptive data readout timing arrangement for an information recording system using prerecorded timing signals for processing serial data signals read out of the system, comprising: a shift register having a plurality of serially connected stages, an independent source of pulses for advanciNg data signals read out of said system through successive ones of said shift register stages, means including a counter driven by said independent source adapted for deriving a digital representation of the timing relationship between said read out data signals and said prerecorded timing signals, and means controlled by said digital representation for determining the number of said shift register stages through which said read out data signals are advanced before being outputted for processing by said prerecorded timing signals.
Claim 13
Dependent Claim
123 words
An adaptive data readout timing arrangement for an information recording system using prerecorded timing signals for processing serial data signals read out of the system, comprising: a shift register having a plurality of serially connected stages, an independent source of pulses for advanciNg data signals read out of said system through successive ones of said shift register stages, means including a counter driven by said independent source adapted for deriving a digital representation of the timing relationship between said read out data signals and said prerecorded timing signals, and means controlled by said digital representation for determining the number of said shift register stages through which said read out data signals are advanced before being outputted for processing by said prerecorded timing signals.
Claim 14
Dependent Claim
36 words
A timing arrangement according to claim 5 wherein said deriving means is connected to a predetermined one of said second plurality of stages and includes logic means operative for connecting said independent source to said counter.
Claim 15
Dependent Claim
42 words
A timing arrangement according to claim 6 wherein said deriving means further includes means responsive to a predetermined prerecorded timing signal for operating said logic means until a predetermined data signal is advanced through said shift register to said predetermined one stage.
Claim 16
Dependent Claim
65 words
A timing arrangement according to claim 5 wherein said shift register comprises a first plurality of stages followed by a second plurality of stages, and wherein said determining means includes individual output gating means connected to each of said second plurality of stages and to said counter, each of said output gating means being individually operated by a respective unique digital state of said counter.
Claim 17
Dependent Claim
29 words
A timing arrangement according to claim 5 wherein said determining means includes gating means individually connected to said counter and to at least two of said shift register stages.
Claim 18
Dependent Claim
28 words
A timing arrangement according to claim 9 wherein each of said gating means is responsive to a respective unique digital representation for outputting said read out data signals.
Claim 19
Dependent Claim
77 words
A timing arrangement according to claim 10 wherein said data signals read out of the system include a predetermined data signal transition, said deriving means further including means responsive to a first predetermined one of said timing signals for enabling said counter to be driven by said independent source, means responsive to said predetermined data signal transition for disabling said counter, and means responsive to a second predetermined one of said timing signals for resetting said counter.
Claim 20
Dependent Claim
45 words
A timing arrangement according to claim 11 wherein said deriving means further includes means responsive to a predetermined digital representation for disabling said counter, a selected one of said gating means being responsive to said predetermined digital representation for outputting said read out data signals.
Claim 21
Dependent Claim
130 words
In combination, a plurality of serially connected shift register stages, a data input terminal connected to a first one of said stages, a plurality of data output terminals individually connected to respective ones of said stages, a timing signal input terminal, a counter, an independent source of signals for advancing data signals at said data input terminal through successive ones of said shift register stages, means including said independent source of signals and said counter for determining a digital representation of the timing relationship between data signals at said data input terminal and timing signals at said timing signal input terminal, output means, and means responsive to said digital representation for connecting said output means to a selected one of said data output terminals in accordance with said digital representation.
Claim 22
Dependent Claim
130 words
In combination, a plurality of serially connected shift register stages, a data input terminal connected to a first one of said stages, a plurality of data output terminals individually connected to respective ones of said stages, a timing signal input terminal, a counter, an independent source of signals for advancing data signals at said data input terminal through successive ones of said shift register stages, means including said independent source of signals and said counter for determining a digital representation of the timing relationship between data signals at said data input terminal and timing signals at said timing signal input terminal, output means, and means responsive to said digital representation for connecting said output means to a selected one of said data output terminals in accordance with said digital representation.
Claim 23
Dependent Claim
73 words
The combination according to claim 13 wherein said determining means is connected to a fixed one of said data output terminals and further includes means responsive to a predetermined timing signal at said timing signal input terminal for operatively connecting said independent source of signals to said counter and means responsive to a subsequent predetermined data signal at said fixed one of said data output terminals for disconnecting said source from said counter.
Claim 24
Dependent Claim
26 words
The combination according to claim 14 wherein said determining means further includes means responsive to a predetermined digital representation for disconnecting said source from said counter.
Claim 25
Dependent Claim
56 words
The combination according to claim 14 wherein said determining means further includes means responsive to the appearance of said predetermined data signal at said fixed one of said data output terminals prior to the appearance of said predetermined timing signal at said timing signal input terminal for inhibiting the connection of said source to said counter.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-05-06 | 1977-11-05 | 1978-05-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-05-06 | 1981-11-05 | 1982-05-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-05-06 | 1985-11-05 | 1986-05-07 | $7700.00 | Window Closed / Lapsed |