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US3810158A Expired / Lapsed US ⏱️ 0.0 years remaining

Decoding system

Assignee: Toshiba Corp
•
Filing: 1971-12-16
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Granted: 1974-05-07
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Expires: 1991-12-16
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Abstract

Abstract A decoding system comprising a network including a plurality of signal supply terminals respectively corresponding to individual digits in the form of binary code, a signal source generating electric signals of three different values in response to the most significant digit and each corresponding digit, said electric signals being selectively applied to the corresponding signal supply terminals by means of switching circuits.

Inventors

  • 👤 J Murakami
  • 👤 S Asakawa
  • 👤 K Takeuchi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 22:24
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/084; H03K17/00; H03K17/51; H03K17/74; H03M; H03M1/00; H03M1/66; H03M1/74; H03M1/76; H03M1/78; H03M1/785

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 366 words
A decoding system adapted for use in a non-linear companding voice PCM communication system for decoding a digital signal composed of a plurality of digits into an analogue voice signal, comprising: a netWork including a plurality of signal supply terminals, each corresponding to respective digits of the digital signal being decoded; an output terminal; and means coupling said signal supply terminals to said output terminal; a source of d.c. signals of three different values, +E,0 and -E; a plurality of single stage switching circuits each corresponding to a respective signal supply terminal, single stage switching circuit including means responsive to signals representing the states of the most significant digit and another digit of said digital signal for selectively supplying one of said d.c. signals of three different values from said signal to said respective signal supply terminals; and a further switching circuit including means responsive to a signal representing the state of the most significant digit of said digital signal for supplying one of said d.c. signals of three different values from said signal source to a predetermined signal supply terminal to generate an analogue signal corresponding to said digital signal at said output terminal; each of said switching circuits including a bridge circuit comprised of a plurality of diodes (21-24) connected in a bridge configuration, first and second resistors (15a, 15b) connected at one end to the respective common electrode junctions of pairs of said bridge diodes and at the other end to respective first and second terminals (14a, 14b) supplied with digit signals (bj and bj, respectively). means coupling another junction of said bridge diodes (21, 23) to ground, a third resistor (25) connected at one end to the remaining junction of said bridge diodes (22, 24) and at the other end to a digit terminal (11) supplied with the most significant digit signal (b0), a common line connected between said remaining junction of said bridge diodes (22, 24) and the signal supply terminal (9), a first diode (2) having its cathode connected to said common line and its anode supplied with signal -E, and a second diode (1) having its anode connected to said common line and its cathode supplied with signal +E.
Claim 2
Dependent Claim 366 words
A decoding system adapted for use in a non-linear companding voice PCM communication system for decoding a digital signal composed of a plurality of digits into an analogue voice signal, comprising: a netWork including a plurality of signal supply terminals, each corresponding to respective digits of the digital signal being decoded; an output terminal; and means coupling said signal supply terminals to said output terminal; a source of d.c. signals of three different values, +E,0 and -E; a plurality of single stage switching circuits each corresponding to a respective signal supply terminal, single stage switching circuit including means responsive to signals representing the states of the most significant digit and another digit of said digital signal for selectively supplying one of said d.c. signals of three different values from said signal to said respective signal supply terminals; and a further switching circuit including means responsive to a signal representing the state of the most significant digit of said digital signal for supplying one of said d.c. signals of three different values from said signal source to a predetermined signal supply terminal to generate an analogue signal corresponding to said digital signal at said output terminal; each of said switching circuits including a bridge circuit comprised of a plurality of diodes (21-24) connected in a bridge configuration, first and second resistors (15a, 15b) connected at one end to the respective common electrode junctions of pairs of said bridge diodes and at the other end to respective first and second terminals (14a, 14b) supplied with digit signals (bj and bj, respectively). means coupling another junction of said bridge diodes (21, 23) to ground, a third resistor (25) connected at one end to the remaining junction of said bridge diodes (22, 24) and at the other end to a digit terminal (11) supplied with the most significant digit signal (b0), a common line connected between said remaining junction of said bridge diodes (22, 24) and the signal supply terminal (9), a first diode (2) having its cathode connected to said common line and its anode supplied with signal -E, and a second diode (1) having its anode connected to said common line and its cathode supplied with signal +E.
Claim 3
Dependent Claim 83 words
A decoding system according to claim 1 comprising: a second bridge circuit including a plurality of diodes (26 - 29) connected between said third resistor (25) and said digit terminal (11), a fourth resistor (30) connected between a common electrode junction of said diodes (26, 28) of said second bridge circuit and said first terminal (14a), and a fifth resistor (31) connected between the other common electrode junction of said diodes (27, 29) of said second bridge circuit and said second terminal (14b).
Claim 4
Dependent Claim 81 words
A decoding system according to claim 1 wherein said further switching circuit further includes means responsive to a signal representing the state of the predetermined ones of said digital signal for supplying one of said D.C. signals of three different values from said signal source to at least one of said signal supply terminals, to thereby generate an analogue signal corresponding to said digital signal at said output terminal and eliminating third order distortion in the decoding of said digital signal.
Claim 5
Dependent Claim 16 words
A decoding system according to claim 1 wherein said network comprises a voltage-driven ladder resistor network.
Claim 6
Dependent Claim 300 words
A decoding system for decoding a digital signal composed of a plurality of digits into an analogue signal, comprising: a source of first and second and third voltages (V1, V2 and V3); a voltage driven ladder resistor type network having a plurality of signal supply terminals; and a plurality of switching circuits is respectively connected to individual signal supply terminals and responsive to said digits of said digital signal for selectively supplying said signal supply terminals with three different values of voltage depending upon the digital signal, said switching circuits each including a common line (10) connected to the coRresponding one of said signal supply terminals, a current source (5) connected to said common line (10) and supplying positive or negative current in accordance with said digital signal a first diode (1) whose anode is connected to said common line (10) and whose cathode is impressed with said first voltage (V1), a second diode (2) whose cathode is connected to said common line (10) and whose anode is impressed with said second voltage (V2), a third diode (3) whose anode is connected to said common line (10), a fourth diode (4) whose cathode is connected to said common line (10), a first switching element (6) controlled by said digital signal and having one terminal thereof connected to the cathode of said third diode (3) and the other terminal thereof impressed with said third voltage (V3), and a second switching element (7) performing an opposite action to said first switching circuit (6) and having one terminal thereof connected to the anode of said fourth diode (4) and the other terminal thereof impressed with said third voltage (V3), wherein said first, second and third voltages (V1, V2 and V3) have a relation to each other as follows: V1 > V3 > V2.
Claim 7
Dependent Claim 300 words
A decoding system for decoding a digital signal composed of a plurality of digits into an analogue signal, comprising: a source of first and second and third voltages (V1, V2 and V3); a voltage driven ladder resistor type network having a plurality of signal supply terminals; and a plurality of switching circuits is respectively connected to individual signal supply terminals and responsive to said digits of said digital signal for selectively supplying said signal supply terminals with three different values of voltage depending upon the digital signal, said switching circuits each including a common line (10) connected to the coRresponding one of said signal supply terminals, a current source (5) connected to said common line (10) and supplying positive or negative current in accordance with said digital signal a first diode (1) whose anode is connected to said common line (10) and whose cathode is impressed with said first voltage (V1), a second diode (2) whose cathode is connected to said common line (10) and whose anode is impressed with said second voltage (V2), a third diode (3) whose anode is connected to said common line (10), a fourth diode (4) whose cathode is connected to said common line (10), a first switching element (6) controlled by said digital signal and having one terminal thereof connected to the cathode of said third diode (3) and the other terminal thereof impressed with said third voltage (V3), and a second switching element (7) performing an opposite action to said first switching circuit (6) and having one terminal thereof connected to the anode of said fourth diode (4) and the other terminal thereof impressed with said third voltage (V3), wherein said first, second and third voltages (V1, V2 and V3) have a relation to each other as follows: V1 > V3 > V2.

References Cited (Backward Citations)

US26076A Cited
US2718634A Cited
US3223992A Cited
US3366804A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-05-06 1977-11-05 1978-05-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-05-06 1981-11-05 1982-05-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-05-06 1985-11-05 1986-05-07 $7700.00 Window Closed / Lapsed

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