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US3801982A Expired / Lapsed US ⏱️ 0.0 years remaining

Post storage range and doppler correlation method and apparatus

Assignee: Lockheed Martin Corp
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Filing: 1968-04-22
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Granted: 1974-04-02
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Expires: 1988-04-22
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Abstract

Abstract Apparatus is herein disclosed for processing signals by storing and correlating with preset programs. The apparatus is disclosed as it relates to a pulse doppler radar application. Target reflected coded signals modulated by doppler are partly correlated to resolve ranges which are ambiguous with relation to one remaining uncorrelated code. The partly correlated signals are stored in a magnetic core matrix. A series of stitching networks wired (or stitched) for various dopplers are coupled to the core matrix via a series of sense inversion switches which are set by a shift register in accordance with the remaining uncorrelated code. The stitch networks compare the stored code time histories as altered by the sense inversion switches with preset codes representing doppler.

Inventors

  • 👤 M Richmond

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 05:35
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/02; G01S13/50; G01S13/58; G01S13/64

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 79 words
A signal processor for processing signals made up of more than one code, comprising: input means; means coupled to said input means for partly correlating the signals to correlate all but said one code; means for storing said partly correlated signals; and means coupled to said storage means for correlating said one code, including a shift register stitched in accordance with said one code selected stages of said shift register being coupled to predetermined portions of said storage means.
Claim 2
Dependent Claim 79 words
A signal processor for processing signals made up of more than one code, comprising: input means; means coupled to said input means for partly correlating the signals to correlate all but said one code; means for storing said partly correlated signals; and means coupled to said storage means for correlating said one code, including a shift register stitched in accordance with said one code selected stages of said shift register being coupled to predetermined portions of said storage means.
Claim 3
Dependent Claim 52 words
A signal processor as defined in claim 1, in which said correlation means further includes: a clock coupled to the input of said shift register; and a plurality of sense inversion switches, one coupled to each stage of said shift register, said sense inversion switches also being coupled to said storage means.
Claim 4
Dependent Claim 80 words
A signal processor as defined in claim 2, in which said means for storing said partly correlated signals includes: an orthogonal storage matrix comprising a multiplicity of bi-stable logic elements arranged in rows and columns, an electrical conductor connected to the bi-stable logic elements of each row of bi-stable logic elements, an electrical conductor connected to the bi-stable logic elements of each column of bi-stable logic elements; and means for applying said partly correlated signals to said orthogonal storage matrix.
Claim 5
Dependent Claim 74 words
A signal processor as defined in claim 3, in which said means for applying said partly correlated signals to said orthogonal storage matrix includes means for sequentially applying write pulses to the conductors connecting said columns of bi-stable logic elements simultaneously with the application of said partly correlated signals to the conductors connecting said rows of bi-stable logic elements, said write pulses being applied at the rate at which said one code was generated.
Claim 6
Dependent Claim 17 words
A signal processor as defined in claim 4, in which said bi-stable logic elements are magnetic cores.
Claim 7
Dependent Claim 103 words
In a pulse doppler radar system in which the transmitted signal is comprised of a first code modulated by at least one other code, each code representing different size range intervals, a receiver signal processor, comprising: input means; means coupled to said input means for partly correlating received target reflected signals to remove all but one code, thus acquiring fine range resolution in one broad ambiguous range interval; means for storing said partly correlated signals; means for correlating said one code in said stored signals; and a signal correlator coupled to said means for correlating said one code, said signal correlator resolving doppler.
Claim 8
Dependent Claim 103 words
In a pulse doppler radar system in which the transmitted signal is comprised of a first code modulated by at least one other code, each code representing different size range intervals, a receiver signal processor, comprising: input means; means coupled to said input means for partly correlating received target reflected signals to remove all but one code, thus acquiring fine range resolution in one broad ambiguous range interval; means for storing said partly correlated signals; means for correlating said one code in said stored signals; and a signal correlator coupled to said means for correlating said one code, said signal correlator resolving doppler.
Claim 9
Dependent Claim 53 words
A signal processor as defined in claim 6, in which said signal correlator includes at least one correlation network having a plurality of multi-level elements, each correlation network grouped to sum substantially all of a multiplicity of simultaneously presented pulses representing phase characteristics as a function of time of a particular signal only.
Claim 10
Dependent Claim 20 words
A signal processor as defined in claim 7, in which said multi-level elements are toroids having linear transformer magnetic characteristics.
Claim 11
Dependent Claim 74 words
A signal processor as defined in claim 6, in which said storing means includes: an orthogonal storage matrix comprising a multiplicity of bi-stable logic elements arranged in rows and columns, an electrical conductor connected to the bi-stable logic elements of each row of bi-stable logic elements, an electrical conductor connected to the bi-stable logic elements of each column of bi-stable logic elements; and means for applying said partly correlated signals to said orthogonal matrix.
Claim 12
Dependent Claim 36 words
A signal processor as defined in claim 9, in which said means for correlating said one code includes means coupling said storage means and said signal correlator for sense inverting selected bits of said stored signals.
Claim 13
Dependent Claim 45 words
A signal processor as defined in claim 10, in which said sense inverting means includes a plurality of sense inversion switches coupling the column electrical conductors of said storage matrix and said signal correlator and means for actuating selected ones of said sense inversion switches.
Claim 14
Dependent Claim 27 words
A signal processor as defined in claim 11, further including a plurality of memory devices, one coupling each row electrical conductor to its respective sense inversion switch.
Claim 15
Dependent Claim 25 words
A signal processor as defined in claim 11, in which said means for actuating selected one of said sense inversion switches includes a shift register.
Claim 16
Dependent Claim 21 words
A signal processor as defined in claim 13, in which said shift register is wired in accordance with said one code.
Claim 17
Dependent Claim 20 words
A signal processor as defined in claim 14, further including means for advancing said one code through said shift register.
Claim 18
Independent Claim 66 words
A method for resolving range and doppler of received target signals after transmitting a signal comprising a first code modulated by one or more codes, comprising the steps of: compressing the received signals to remove all but one code; storing the partly correlated signals; altering the stored signals to remove said one code; and summing the resultant signals in accordance with predetermined programs representing various dopplers.
Claim 19
Independent Claim 66 words
A method for resolving range and doppler of received target signals after transmitting a signal comprising a first code modulated by one or more codes, comprising the steps of: compressing the received signals to remove all but one code; storing the partly correlated signals; altering the stored signals to remove said one code; and summing the resultant signals in accordance with predetermined programs representing various dopplers.

References Cited (Backward Citations)

US3208065A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-04-01 1977-10-01 1978-04-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-04-01 1981-10-01 1982-04-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-04-01 1985-10-01 1986-04-02 $7700.00 Window Closed / Lapsed

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