US3801835A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multiphase signal generator
Assignee: Individual
•
Filing: 1973-02-20
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Granted: 1974-04-02
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Expires: 1993-02-20
Abstract
Abstract Multiphase signal generator having cyclic operation, for example for controlling signal lights at a highway crossroads. A digit assembly counts clock pulses and controls output amplifiers. Moreover, it successively selects impedances each controlling the clock pulse frequency during one or several phases of the cycle. These impedances are adjustable individually. A fast auxiliary clock enables certain phases of the cycle to be shortened as a function of outside signals.
Inventors
- 👤 A Tasso
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 12:53
CPC Classifications
G; G08; G08G; G08G1/00; G08G1/07; G08G1/08
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
300 words
Multiphase signal generator suitable for feeding a number q of output terminals by suppLying to each of said output terminals an output signal existing during operating periods and not existing outside said operating periods, the order of succession of the said operating periods of the various output signals being predetermined, said generator comprising a clock system means adapted to receive a duration control signal and responsive to said duration control signal for producing clock instants separated by time intervals whose duration is controlled by said duration control signal, a digit assembly means for counting the said clock instants, for supplying the said output signals at the said output terminals, and for controlling the start and stop times of said operating periods in response to the counting of predetermined numbers of clock instants, said digit assembly means comprising a number p of selection terminals, means for supplying to each of said selection terminals a selection signal existing during selection periods and not existing outside said selection periods, one selection signal at the most existing any instant on said selection terminals as a whole, said selection periods beginning and ending when said digit assembly counting means has counted predetermined numbers of clock instants, the said generator further comprising, control circuit means connected to the said selection terminals for supplying said duration control signal to said clock system means said control circuit means comprising adjustable elements equal in number to said number p and each capable of assuming various adjustment values, each said adjustable element corresponding to one of said selection terminals so that the value of said duration control signal is controlled during each of the said selection periods by the adjusting value of the one of said adjustable elements which corresponds to the selection terminal on which a selection signal exists.
Claim 2
Dependent Claim
300 words
Multiphase signal generator suitable for feeding a number q of output terminals by suppLying to each of said output terminals an output signal existing during operating periods and not existing outside said operating periods, the order of succession of the said operating periods of the various output signals being predetermined, said generator comprising a clock system means adapted to receive a duration control signal and responsive to said duration control signal for producing clock instants separated by time intervals whose duration is controlled by said duration control signal, a digit assembly means for counting the said clock instants, for supplying the said output signals at the said output terminals, and for controlling the start and stop times of said operating periods in response to the counting of predetermined numbers of clock instants, said digit assembly means comprising a number p of selection terminals, means for supplying to each of said selection terminals a selection signal existing during selection periods and not existing outside said selection periods, one selection signal at the most existing any instant on said selection terminals as a whole, said selection periods beginning and ending when said digit assembly counting means has counted predetermined numbers of clock instants, the said generator further comprising, control circuit means connected to the said selection terminals for supplying said duration control signal to said clock system means said control circuit means comprising adjustable elements equal in number to said number p and each capable of assuming various adjustment values, each said adjustable element corresponding to one of said selection terminals so that the value of said duration control signal is controlled during each of the said selection periods by the adjusting value of the one of said adjustable elements which corresponds to the selection terminal on which a selection signal exists.
Claim 3
Dependent Claim
162 words
The generator according to claim 1, wherein said clock system comprises a clock pulse oscillator for generating clock pulses which define said clock instants, said clock pulses being connected to said digit assembly means, the said duration control signal being a frequency control signal controlling the recurrence frequency of the said clock pulse oscillator, and wherein said adjustable elements are adjustable impedances (RG1, RG2), a first terminal of each of said impedances being connected to the said selection terminal corresponding thereto, the second terminals of these impedances all being connected to a common control terminal (BC) of the said clock pulse oscillator (OH) to supply said frequency control signal to said oscillator, the said selection signals being constituted by potentials suitable for supplying a frequency control current to the said clock pulse oscillator (OH) through said adjustable impedances (RG1, RG2), that control current constituting the said frequency control signal having a value controlled by the adjustment values of the said adjustable impedances.
Claim 4
Dependent Claim
52 words
The generator according to claim 2, wherein said adjustable impedances are adjustable resistors (RG1, RG2), the said selection signals being constituted by continuous potentials, an insulation rectifier (D1, D2) being connected in series with each of said adjustable resistors in the suitable direction for enabling the said frequency control current to pass.
Claim 5
Dependent Claim
75 words
The generator according to claim 3, wherein said clock pulse oscillator (OH) comprises a unijunction transistor (UJT) whose emitter is connected to the said frequency control terminal BC and to a first terminal of a capacitor CH, the two bases of said transistor and the second terminal of said capacitor being connected to direct current potential sources, means being provided for producing the said clock pulses from the relaxation oscillations of the circuit thus formed.
Claim 6
Dependent Claim
43 words
The generator according to claim 4 wherein the said digit assembly counts the said clock pulses from zero until a number n greater than the said numbers p and q, and starts again from zero, whereby that generator operates in a cyclic manner.
Claim 7
Dependent Claim
230 words
The generator according to claim 5, wherein said digit assembly comprises: a counting assembly means (DF DC) for receiving and counting said clock pulses and supplying counting pulses each time it has counted predetermined numbers of clock pulses, the number m of these predetermined numbers being less than the said number n and at least equal to the said number p; a ring type step by step switch means (CA) for receiving the said counting pulses, provided with outputs at least equal in number to the said number m, and capable of supplying, on each of these outputs, a phase signal beginning with one said counting pulse and ending with the following counting pulse, these phase signals succeeding one another in a cyclic manner on said outputs in a predetermined succession order; an output decoder means (DS) comprising logic gates of the OR type, each of the inputs of each of these gates being connected to a said output of the ring type step by step switch means (CA), the outputs of these gates constituting the said output terminals of the generator; and a selection decoder means (DR) comprising logic gates of the OR type, each of the inputs of each of these gates being connected to a said output of the ring type step by step switch means (CA), the outputs of these gates constituting the said selection terminals.
Claim 8
Dependent Claim
100 words
The generator according to claim 6, wherein said counting assembly comprises: a frequency divider (DF) receiving the said clock pulses and constituted by flip-flops which are a in number, n being at the most equal to the ath power of the number two; a counting decoder (DC) consisting of logic gates of the AND type, the inputs of these gates being connected to the said flip-flops, the output of each of these gates being connected to a distinct input of the said ring type step by step switch (CA) to supply to that switch one of the said counting pulses.
Claim 9
Dependent Claim
47 words
The generator according to claim 6, wherein each of the said output terminals is provided with a controlled power switch set in its conductive state by the applying of one said output signal on that output terminal, and then suitable for allowing an alternate current to pass.
Claim 10
Dependent Claim
158 words
The generator according to claim 6, further comprising: at least one detection terminal (609) capable of receiving a detection signal; a logic circuit (608, 606, 614, FT) receiving on the one hand the said detection signal and on the other hand at least one auxiliary signal (V1) supplied by the said digit assembly (EN), that auxiliary signal beginning and ending when that digit assembly (EN) has counted predetermined numbers of clock pulses, that logic circuit being capable of supplying an energization signal when it receives the said auxiliary signal without receiving the said detection signal; and a fast oscillator (OHR) for supplying to the said digit assembly clock pulses at a recurrence frequency greater than the frequencies which the said clock pulse oscillator (OH) supply when it receives the said control signal, said fast oscillator being controlled by the said logic circuit so as to operate only when the said energization signal is supplied by said logic circuit.
Claim 11
Dependent Claim
52 words
The generator according to claim 9, wherein said logic circuit (608, 606, 114, FT) comprises means (T) for the said energization signal to be supplied only after a predetermined lapse of time has passed from the instant when that logic circuit receives the said auxiliary signal without receiving the said detection signal.
Claim 12
Dependent Claim
100 words
The generator according to claim 9, comprising: at least two detection terminals (609, 611) capable of receiving at least a first and a second said detection signal; the said digit assembly (EN), capable of supplying at least a first and a second said auxiliary signal (V1, V2) corresponding to the said first And second detection signals, respectively; the said logic circuit (608, 610, 606, 614, FT) receiving the said auxiliary and detection signals, capable of supplying the said energization signal when it receives only one of the said auxiliary signals without receiving at the same time, the corresponding detection signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-04-01 | 1977-10-01 | 1978-04-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-04-01 | 1981-10-01 | 1982-04-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-04-01 | 1985-10-01 | 1986-04-02 | $7700.00 | Window Closed / Lapsed |