US3800079A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Compensation for a scanning system
Assignee: International Business Machines Corp
•
Filing: 1972-12-18
•
Granted: 1974-03-26
•
Expires: 1992-12-18
Abstract
Abstract A sensitivity profile of photodiodes forming a self-scanned photodiode array operating in the charge storage mode is obtained as the array scans a standard background or white level while in a non-operational or write mode. The serial output of the photodiode array is integrated and a predetermined grey level is subtracted to limit the resultant signal to the range affected by photodiode sensitivity variations and illumination nonuniformities. The resultant signal is digitized and stored under control of a write control signal. Compensation then takes place in an operational mode. The stored digital signals are converted to an analog signal and the grey level is added thereto. This resultant signal is then applied as a compensation signal to a differential amplifier and to a divider circuit. The serial uncorrected video information signal from the integrator is also applied to the differential amplifier whose output is applied to the divider circuit where the photodiode sensitivity and illumination variations are removed to provide a corrected video information signal.
Inventors
- 👤 Neil W Mc
- 👤 W Rohland
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 00:21
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/40; H04N1/401; G; G06; G06V; G06V10/00; G06V10/10; G06V10/12
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
109 words
A sensitivity compensation circuit for a self-scanned photodiode array having a serial video information output comprising: generating means for generating a photodiode sensitivity profile signal for the photodiodes in said array, storage means for storing said sensitivity profile signal during a predetermined mode of operation of said photodiode array, means for entering said sensitivity profile signal into said storage means, means for retrieving said sensitivity profile signal from said storage means as said photodiode array produces a serial video information output, and corrections means responsive to said sensitivity profile signal retrieved from said storage means and said serial video information output for generating a corrected serial video information signal.
Claim 2
Dependent Claim
109 words
A sensitivity compensation circuit for a self-scanned photodiode array having a serial video information output comprising: generating means for generating a photodiode sensitivity profile signal for the photodiodes in said array, storage means for storing said sensitivity profile signal during a predetermined mode of operation of said photodiode array, means for entering said sensitivity profile signal into said storage means, means for retrieving said sensitivity profile signal from said storage means as said photodiode array produces a serial video information output, and corrections means responsive to said sensitivity profile signal retrieved from said storage means and said serial video information output for generating a corrected serial video information signal.
Claim 3
Dependent Claim
48 words
The sensitivity compensation circuit of claim 1 wherein said generating means comprises an integrator for generating a signal by integrating said serial video information output of said photodiode array as said photodiode array scans a standard reflectance level, and means for digitizing said signal generated by said integrator.
Claim 4
Dependent Claim
27 words
The sensitivity compensation circuit of claim 2 wherein said generating means further comprises means for subtracting a predetermined signal level from said signal generated by said integrator.
Claim 5
Dependent Claim
22 words
The sensitivity compensation circuit of claim 1 wherein said means for entering said sensitivity profile into said storage means is selectively operable.
Claim 6
Dependent Claim
50 words
The sensitivity compensation circuit of claim 4 wherein said means for selectively entering said sensitivity profile into said storage means comprises a plurality of AND circuits connected between said means for digitizing said signal generated by said integrator and said storage means, and means for selectively conditioning said AND circuits.
Claim 7
Dependent Claim
13 words
The sensitivity compensation circuit of claim 1 wherein said storage means is digital.
Claim 8
Dependent Claim
43 words
The sensitivity compensation circuit of claim 1 wherein said correction means comprises subtraction means for subtracting said uncorrected serial video information output from said sensitivity profile signal, and dividing means for dividing the output of said subtraction means by said sensitivity profile signal.
Claim 9
Dependent Claim
15 words
The sensitivity compensation circuit of claim 7 wherein said subtraction means is a differential amplifier.
Claim 10
Dependent Claim
16 words
The sensitivity compensation circuit of claim 1 wherein said storage means is an alterable storage means.
Claim 11
Dependent Claim
20 words
The sensitivity compensation circuit of claim 9 further comprising means for dynamically updating the contents of said alterable storage means.
Claim 12
Dependent Claim
34 words
The sensitivity compensation circuit of claim 1 wherein said generating means periodically generates a photodiode sensitivity profile signal for the photodiodes in said array during a predetermined mode of operation of said photodiode array.
References Cited (Backward Citations)
US2989585A
Cited
US3536830A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-03-25 | 1977-09-24 | 1978-03-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-03-25 | 1981-09-24 | 1982-03-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-03-25 | 1985-09-24 | 1986-03-26 | $7700.00 | Window Closed / Lapsed |