US3798635A
Expired / Lapsed
US
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Channel monitor for compressed-code pcm transmission system
Assignee: Italtel SpA
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Filing: 1972-05-05
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Granted: 1974-03-19
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Expires: 1992-05-05
Abstract
Abstract A transmission path carrying interleaved messages in the form of compressed eight-bit code words is tapped for the selective monitoring of any of its message channels by means of a clockpulse extractor and an entrance register controlled thereby to store an eight-bit word including a sign bit Qs, three rangeindicating bits a, b, c and a group of four significant bits X, Y, Z, W. This compressed code word is converted, through a logic matrix receiving the stored range bits a, b, c, into an expanded 12-bit word inscribed in an expansion register from which a decoder derives a selectively amplified replica of the original analog signal. The selective amplification is achieved by shifting the bits in the expansion register to denominational positions higher than those indicated by the stored range bits, the multiplication factor (i.e. the number of register stages encompassed by the shift) being established by a digital detector determining the highest amplitude range indicated in the monitored channel during a measuring period.
Inventors
- 👤 G Candiani
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 13:47
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/14; H04B; H04B14/00; H04B14/02; H04B14/04
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
328 words
A supervisory network for monitoring a message channel of a pulse-code-modulation system in which messages are transmitted over a signal path in the form of compressed code words each derived from an original code word with a predetermined larger number of bits, each compressed code word including a group of significant bits preceded by an m-bit combination with a predetermined numerical value p identifying one of several amplitude ranges of an analog signal represented by said original code word, m being greater than 1, compRising: an entrance register with a number of stages sufficient to accommodate the m bits of said combination and said significant bits; input means for repeatedly loading said entrance register with a code word from said channel during a predetermined measuring period; an expansion register with a larger number of stages than said entrance register; circuitry between said registers for transferring said group of significant bits from respective stages of said entrance register to consecutive stages of said expansion register; logic means with input connections to stages of said entrance register accommodating said m bits, said logic means controlling said circuitry for directing said significant bits to stages of said expansion register of a higher rank than corresponds to the numerical value p of said m-bit combination, with resulting multiplication of the numerical weight of said group of significant bits as compared with said original code word, said logic means including storage means for a value pmax representing the maximum of said numerical value p established during said measuring period, said circuitry being responsive to the stored maximum value pmax for modifying the ranks of the stages assigned to said significant bits in said expansion register to vary the factor of multiplication of said numerical weight generally inversely with said maximum value pmax; decoding means connected to said expansion register for producing a substantial replica of said analog signal; and indicator means connected to said decoding means for ascertaining the amplitude of said replica.
Claim 2
Dependent Claim
328 words
A supervisory network for monitoring a message channel of a pulse-code-modulation system in which messages are transmitted over a signal path in the form of compressed code words each derived from an original code word with a predetermined larger number of bits, each compressed code word including a group of significant bits preceded by an m-bit combination with a predetermined numerical value p identifying one of several amplitude ranges of an analog signal represented by said original code word, m being greater than 1, compRising: an entrance register with a number of stages sufficient to accommodate the m bits of said combination and said significant bits; input means for repeatedly loading said entrance register with a code word from said channel during a predetermined measuring period; an expansion register with a larger number of stages than said entrance register; circuitry between said registers for transferring said group of significant bits from respective stages of said entrance register to consecutive stages of said expansion register; logic means with input connections to stages of said entrance register accommodating said m bits, said logic means controlling said circuitry for directing said significant bits to stages of said expansion register of a higher rank than corresponds to the numerical value p of said m-bit combination, with resulting multiplication of the numerical weight of said group of significant bits as compared with said original code word, said logic means including storage means for a value pmax representing the maximum of said numerical value p established during said measuring period, said circuitry being responsive to the stored maximum value pmax for modifying the ranks of the stages assigned to said significant bits in said expansion register to vary the factor of multiplication of said numerical weight generally inversely with said maximum value pmax; decoding means connected to said expansion register for producing a substantial replica of said analog signal; and indicator means connected to said decoding means for ascertaining the amplitude of said replica.
Claim 3
Dependent Claim
22 words
A network as defined in claim 1, further comprising digital indicating means connected to said storage means for displaying said multiplication factor.
Claim 4
Dependent Claim
73 words
A network as defined in claim 1 wherein said logic means comprises a gating matrix for introducing a marking bit into a stage of said expansion register determined by said numerical value p and by said maximum value pmax, said expansion register being provided with stepping means for shifting said group of significant bits therein from a sequence of originally assigned stages to an extent limited by the position of said marking bit.
Claim 5
Dependent Claim
56 words
A network as defined in claim 3 wherein said marking bit has the logical value of unity, said gating matrix being responsive to the presence of at least one true signal in said input connections for introducing another unity bit into a stage of said expansion register immediately preceding the stages occupied by said significant bits.
Claim 6
Dependent Claim
72 words
A network as defined in claim 3 wherein said stepping means comprises a source of clock pulses connected to said signal path for extracting a synchronizing signal therefrom, said clock pulses being operative to shift the contents of said expansion register step by step toward the last stage thereof, and feedback means connected to said last stage for blocking said clock pulses upon arrival of said marking bit in said last stage.
Claim 7
Dependent Claim
76 words
A network as defined in claim 5 wherein the message channel to be monitored is part of a time-division-multiplex channel group whose code words are transmitted over said signal path in respective time slots, said source having a plurality of terminals energized in cyclic succession during corresponding time slots, said input means comprising selector means connectable to any one of said terminals for enabling said entrance register to receive the bits of a desired message channel.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-03-18 | 1977-09-17 | 1978-03-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-03-18 | 1981-09-17 | 1982-03-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-03-18 | 1985-09-17 | 1986-03-19 | $7700.00 | Window Closed / Lapsed |