Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
233 words
A memory device made as a strip of a ferroelectric material comprising: a ferroelectric strip which acquires piezoelectric properties under the effect of an electric field; storage cells including at least two piezoelectric transducers using sections of said ferroelectric strip; excitation electrodes of said storage cells being disposed on one flat surface of said strip and fed with a read signal; write electrodes being disposed on the same surface of said strip between said excitation electrodes, said write electrodes being enveloped by said excitation electrodes which receive said write signals; screening electrodes being disposed on the opposite flat surface of said strip and being coincident with normal projections of said excitation electrodes onto the same surface and intended, together with the excitation electrodes, to receive the read signal; electrodes forming discharge lines, enveloped by said screening electrodes and disposed on the same flat surface of said strip as said screening electrodes, said discharge line forming electrodes coinciding with normal projections of said write electrodes onto this surface and being intended, together with said write electrodes, to receive write signals; input piezoelectric transducers comprising: a part of said ferroelectric strip which acquire piezoelectric properties in the course of manufacture, said excitation electrodes and said screening electrodes; and output piezoelectric transducers disposed between the input piezoelectric transducers and which comprise a part of said ferroelectric strip, said write electrodes and said discharge lines forming electrodes.
Claim 2
Dependent Claim
233 words
A memory device made as a strip of a ferroelectric material comprising: a ferroelectric strip which acquires piezoelectric properties under the effect of an electric field; storage cells including at least two piezoelectric transducers using sections of said ferroelectric strip; excitation electrodes of said storage cells being disposed on one flat surface of said strip and fed with a read signal; write electrodes being disposed on the same surface of said strip between said excitation electrodes, said write electrodes being enveloped by said excitation electrodes which receive said write signals; screening electrodes being disposed on the opposite flat surface of said strip and being coincident with normal projections of said excitation electrodes onto the same surface and intended, together with the excitation electrodes, to receive the read signal; electrodes forming discharge lines, enveloped by said screening electrodes and disposed on the same flat surface of said strip as said screening electrodes, said discharge line forming electrodes coinciding with normal projections of said write electrodes onto this surface and being intended, together with said write electrodes, to receive write signals; input piezoelectric transducers comprising: a part of said ferroelectric strip which acquire piezoelectric properties in the course of manufacture, said excitation electrodes and said screening electrodes; and output piezoelectric transducers disposed between the input piezoelectric transducers and which comprise a part of said ferroelectric strip, said write electrodes and said discharge lines forming electrodes.
Claim 3
Dependent Claim
147 words
A memory device as claimed in claim 1, further comprising: a layer of a semiconductor material applied onto said strip of the ferroelectric material between said electrodes forming discharge lines, the layer serving to interconnect electrically said discharge line electrodes and to ensure that the output impedance of each said output transducer is ohmic, while said discharge line electrodes are combined in groups one of which is connected to write signal sources for each discharge line; a power supply for each said discharge line one pole of which is connected to said write signal source and the other pole of which is connected to another group of electrodes of said discharge line to ensure the required current flow through said semiconductor layer; and resistors for each said power supply serving to connect said other pole of said power supply to said other electrodes of said discharge line.
Claim 4
Dependent Claim
72 words
A memory device as claimed in claim 2, further comprising control electrodes disposed on said semiconductor layer and isolated from the latter which electrodes serve to generate an electric field in said semiconductor layer; a layer of an insulation material placed between said semiconductor layer and said control electrodes; and a decoder connected to all of said control electrodes serving to feed the latter with a potential corresponding to a selected address.