Abstract This specification discloses a memory made up of a plurality of bidirectional shift registers capable of being accessed at either end. Each shift register stores only one bit of every page of data stored in the memory so that all the bits of any one page can be read out contemporaneously by accessing the shift registers in parallel. All the pages stored in the memory are divided into two groups with all the pages of one group being accessed at one end of the shift registers while all the pages of the other group are accessed at the other end of the shift registers. Within each group the pages are arranged in order of last use with the most recently used page located closest to the end of the shift register at which it is being accessed.
A memory comprIsing: a plurality of K position shift registers each storing one bit of every page of a class of data, said class of data being divided into two groups with the bits of the pages from the first group located at the K position end of the shift register and the bits of the pages in the second group located at the 1 position end of the shift register; a bidirectional accessing loop means in each shift register which includes all the positions of the shift register including the K bit of the shift register for shifting data of the first group bit by bit from the K-1 position through the K position and into the 1 position until the desired bit of data of the first group is in the K position or for shifting data of the second group bit by bit from the 1 position through the K position into the K-1 position until a desired bit of data of the second group is placed in the K position of the shift register; and a bidirectional reordering loop means in each of the registers which includes all the bits of the shift register except the K position for returning first group bits to the K-1 end of the shift register from the 1 position to position K-1 after accessing or for returning second group bits to the 1 position end of the shift register from the 1 position into the K-1 position after accessing whereby the last used bit remains in the K position and the other bits of the memory are organized in their group in order of last use.
Claim 2
Dependent Claim
276 words
A memory comprIsing: a plurality of K position shift registers each storing one bit of every page of a class of data, said class of data being divided into two groups with the bits of the pages from the first group located at the K position end of the shift register and the bits of the pages in the second group located at the 1 position end of the shift register; a bidirectional accessing loop means in each shift register which includes all the positions of the shift register including the K bit of the shift register for shifting data of the first group bit by bit from the K-1 position through the K position and into the 1 position until the desired bit of data of the first group is in the K position or for shifting data of the second group bit by bit from the 1 position through the K position into the K-1 position until a desired bit of data of the second group is placed in the K position of the shift register; and a bidirectional reordering loop means in each of the registers which includes all the bits of the shift register except the K position for returning first group bits to the K-1 end of the shift register from the 1 position to position K-1 after accessing or for returning second group bits to the 1 position end of the shift register from the 1 position into the K-1 position after accessing whereby the last used bit remains in the K position and the other bits of the memory are organized in their group in order of last use.
Claim 3
Dependent Claim
16 words
The memory of claim 1 wherein certain of the bits in each page are address bits.
Claim 4
Dependent Claim
21 words
The memory of claim 2 wherein one of the address bits in each page indicates which group the page is in.
Claim 5
Dependent Claim
21 words
The memory of claim 2 wherein the low order address bits in each page indicates which group the page is in.
Claim 6
Dependent Claim
14 words
The memory of claim 4 wherein said shift registers are magnetic bubble shift registers.
Claim 7
Independent Claim
245 words
A method of using a K position bidirectional shift register with a data accessing loop for shifting data in either direction into the K position for accessing and a data reordering loop for shifting data in either direction in any position of the shift register but the K position, comprising the steps of: dividing data bits to be stored in the shift register into two groups; storing the first group at the K-1 stage end of the shift register and storing the second group at the one stage end of the shift register; using the accessing loop to shift a desired bit of data from the first group into the K position in one direction to access said desired bit; using the reordering loop in the opposite direction to return any first group bits back to the position K-1 end of the shift register while said desired bit is held in the K position of the shift register; using the accessing loop in said opposite direction to shift a requested bit located in the second group into the K position to access said requested bit; and using the reordering loop to move bits of said second group moved to the 1 position end of the shift register while said requested bit is retained in the K position of the shift register whereby the data bits within the group are positioned in the order in which they were shifted into the K position of the register.
Claim 8
Independent Claim
245 words
A method of using a K position bidirectional shift register with a data accessing loop for shifting data in either direction into the K position for accessing and a data reordering loop for shifting data in either direction in any position of the shift register but the K position, comprising the steps of: dividing data bits to be stored in the shift register into two groups; storing the first group at the K-1 stage end of the shift register and storing the second group at the one stage end of the shift register; using the accessing loop to shift a desired bit of data from the first group into the K position in one direction to access said desired bit; using the reordering loop in the opposite direction to return any first group bits back to the position K-1 end of the shift register while said desired bit is held in the K position of the shift register; using the accessing loop in said opposite direction to shift a requested bit located in the second group into the K position to access said requested bit; and using the reordering loop to move bits of said second group moved to the 1 position end of the shift register while said requested bit is retained in the K position of the shift register whereby the data bits within the group are positioned in the order in which they were shifted into the K position of the register.