US3797000A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Non-volatile semiconductor storage device utilizing avalanche injection and extraction of stored information
Assignee: International Business Machines Corp
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Filing: 1972-12-29
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Granted: 1974-03-12
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Expires: 1992-12-29
Abstract
Abstract A non-volatile semiconductor storage device that can be electronically erased can be realized from a double gate field effect transistor having a first and second gates, the first gate being closer to the semiconductor body than the second gate and insulated from the body and the second gate so that it is electrically floating. When the floating gate has a thickness and is biased so that complete depletion can be achieved therein and the thickness and ionization rate product is equal to unity stored information in the form of electrons are expelled therefrom due to the effects of avalanche mechanisms.
Inventors
- 👤 B Agusta
- 👤 J Chang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 02:34
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/686; G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0416
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
127 words
An insulated, double gate, field effect transistor storage device that can have information electrically stored therein and electrically removed therefrom comprising a semiconductor substrate of one conductivity type, a source region and a drain region of opposite conductivity type formed in said substrate, said source region being spaced apart from said drain region, a first insulating layer on said substrate intermediate said source region and said drain region, a first gate electrode composed of a semiconductor material having a thickness and impurity concentration therein which has a product less than 3 X 1012 impurity atoms/cm2, overlying said insulating layer, a second gate electrode overlying said first gate electrode and an insulating layer between said first and second gate electrodes electrically isolating said first and second gate electrodes.
Claim 2
Dependent Claim
127 words
An insulated, double gate, field effect transistor storage device that can have information electrically stored therein and electrically removed therefrom comprising a semiconductor substrate of one conductivity type, a source region and a drain region of opposite conductivity type formed in said substrate, said source region being spaced apart from said drain region, a first insulating layer on said substrate intermediate said source region and said drain region, a first gate electrode composed of a semiconductor material having a thickness and impurity concentration therein which has a product less than 3 X 1012 impurity atoms/cm2, overlying said insulating layer, a second gate electrode overlying said first gate electrode and an insulating layer between said first and second gate electrodes electrically isolating said first and second gate electrodes.
Claim 3
Dependent Claim
27 words
The device of claim 1 wherein said first gate electrode has a thickness approximately one order of magnitude greater than the thickness of the first insulating layer.
Claim 4
Dependent Claim
19 words
The device of claim 1 wherein said first insulating layer is silicon dioxide and said first electrode is silicon.
Claim 5
Dependent Claim
14 words
The device of claim 1 wherein said first gate electrode is polycrystalline semiconductor material.
Claim 6
Dependent Claim
12 words
The device of claim 1 wherein said second gate is semiconductor material.
Claim 7
Dependent Claim
35 words
The device of claim 3 wherein said first insulating layer has a thickness in the order of hundreds of Angstroms and said first gate electrode has a thickness in the order of thousands of Angstroms.
Claim 8
Dependent Claim
187 words
A memory storage system that can have information electrically stored therein and electrically removed therefrom comprising, a semiconductor substrate of one conductivity type, a source region and a drain region of opposite conductivity type formed in said substrate, said source region being spaced apart from said drain region, an electrode connected to said source region, an electrode connected to said drain region, a first insulating layer on said substrate intermediate said electrodes, a first gate electrode composed of a semiconductor material having a thickness and impurity concentration therein which has a product less than 3 X 1012 impurity atoms/cm2 disposed on said first insulating layer, a second gate electrode overlaying said first gate electrode, a second insulating layer between said first and second gate electrodes to electrically isolate said first gate electrode from said second gate electrode, means for coupling the source diffusion, the drain diffusion and the substrate to ground, and means for applying a voltage pulse to said second gate electrode sufficient to achieve complete depletion in said first gate electrode and to expell stored charges therefrom through said first insulating layer into said substrate.
Claim 9
Dependent Claim
187 words
A memory storage system that can have information electrically stored therein and electrically removed therefrom comprising, a semiconductor substrate of one conductivity type, a source region and a drain region of opposite conductivity type formed in said substrate, said source region being spaced apart from said drain region, an electrode connected to said source region, an electrode connected to said drain region, a first insulating layer on said substrate intermediate said electrodes, a first gate electrode composed of a semiconductor material having a thickness and impurity concentration therein which has a product less than 3 X 1012 impurity atoms/cm2 disposed on said first insulating layer, a second gate electrode overlaying said first gate electrode, a second insulating layer between said first and second gate electrodes to electrically isolate said first gate electrode from said second gate electrode, means for coupling the source diffusion, the drain diffusion and the substrate to ground, and means for applying a voltage pulse to said second gate electrode sufficient to achieve complete depletion in said first gate electrode and to expell stored charges therefrom through said first insulating layer into said substrate.
Claim 10
Dependent Claim
12 words
The system of claim 7 wherein said first gate electrode is polycrystalline.
Claim 11
Dependent Claim
21 words
The system of claim 8 wherein said first and second gate electrodes are silicon and said insulating layers are silicon dioxide.
Claim 12
Dependent Claim
35 words
The system of claim 9 wherein said first gate electrode has a thickness in the order of thousands of Angstroms and said first insulating layer has a thickness in the order of hundreds of Angstroms.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-03-11 | 1977-09-10 | 1978-03-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-03-11 | 1981-09-10 | 1982-03-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-03-11 | 1985-09-10 | 1986-03-12 | $7700.00 | Window Closed / Lapsed |