US3796955A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Gate oxide early fail screening test utilizing a low pressure plasma
Assignee: International Business Machines Corp
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Filing: 1971-11-30
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Granted: 1974-03-12
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Expires: 1991-11-30
Abstract
Abstract A method of accelerating early gate oxide failures in Field Effect transistor devices. This method uses a d.c. glow discharge or plasma as a means for electrically inducing, on the gate electrode of such Field Effect Transistors, an electrical potential sufficient to stress the gate oxide under the electrode to a level higher than that seen in normal service. This stressing of the gate oxide is sufficient to cause in a short period of time the failure of those gate oxides which would normally fail within the first few hundred hours of use in the field. The described method accomplishes this very desirable result without affecting those other gate oxides which will perform satisfactorily in service. This use of a plasma or glow discharge to induce the stressing voltage of the gate oxide eliminates the need of mechanically contacting each and every unit. The method of the invention, therefore, not only permits the batch stressing of such units during the production cycle, while the units are still incorporated in a wafer, but further allows subsequent testing of the units whether they be individual FET devices or whether they be corporated in an integrated circuit design.
Inventors
- 👤 A Bhattacharyya
- 👤 J Dinklage
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 01:11
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/26; G01R31/2607; G01R31/2637
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
87 words
A method for assessing the integrity of a dielectric layer on the surface of a semiconductor wafer comprising the steps of placing a semiconductor wafer, having a dielectric layer on a surface thereof, on a support within a closed chamber, evacuating said chamber, introducing an inert gas into said evacuated chamber, creating a glow discharge in said chamber and in contact with said layer to impress across said layer a given field and inspecting said wafer to determine imperfections in said dielectric layer caused by said field.
Claim 2
Independent Claim
87 words
A method for assessing the integrity of a dielectric layer on the surface of a semiconductor wafer comprising the steps of placing a semiconductor wafer, having a dielectric layer on a surface thereof, on a support within a closed chamber, evacuating said chamber, introducing an inert gas into said evacuated chamber, creating a glow discharge in said chamber and in contact with said layer to impress across said layer a given field and inspecting said wafer to determine imperfections in said dielectric layer caused by said field.
Claim 3
Independent Claim
124 words
A method for accelerating gate oxide failure in FET devices comprising the steps of immersing the FET devices in a low pressure plasma of high density creating a d.c. glow discharge between a semiconductor substrate containing an FET device, and a spaced electrode, said FET device having a gate oxide, electrically contacting said gate oxide with said glow discharge, electrically inducing on said gate oxide an electrical field of between 1 x 106 volts/cm and 4 x 106 volts/cm, relative to the semiconductor substrate to stress the gate oxide relative to the semiconductor substrate sufficiently to accelerate the formation of any potential failure mechanism in said gate oxide, and inspecting said FET devices to determine imperfections in said gate oxide caused by said field.
Claim 4
Independent Claim
124 words
A method for accelerating gate oxide failure in FET devices comprising the steps of immersing the FET devices in a low pressure plasma of high density creating a d.c. glow discharge between a semiconductor substrate containing an FET device, and a spaced electrode, said FET device having a gate oxide, electrically contacting said gate oxide with said glow discharge, electrically inducing on said gate oxide an electrical field of between 1 x 106 volts/cm and 4 x 106 volts/cm, relative to the semiconductor substrate to stress the gate oxide relative to the semiconductor substrate sufficiently to accelerate the formation of any potential failure mechanism in said gate oxide, and inspecting said FET devices to determine imperfections in said gate oxide caused by said field.
Claim 5
Dependent Claim
40 words
A method of claim 1 wherein said glow discharge is imposed on said dielectric for a period of about 30 minutes, said dielectric comprises an oxide and said field is between 1 X 106 volts/cm and 4 X 106 volts/cm.
Claim 6
Dependent Claim
24 words
The method of claim 3 where there is further provided the step of imposing a magnetic field on said oxide normal to said oxide.
Claim 7
Dependent Claim
17 words
The method of claim 4 wherein said magnetic field has a field strength greater than 40 gauss.
Claim 8
Dependent Claim
19 words
The method of claim 4 wherein said magnetic field has a field strength of between 40 and 70 gauss.
Claim 9
Dependent Claim
16 words
The method of claim 1 wherein there is further provided the step of heating said wafer.
Claim 10
Dependent Claim
17 words
The method of claim 7 wherein said wafer is heated to a temperaTure between 25*C and 250*C.
Claim 11
Independent Claim
116 words
A method of stressing oxide layers on the surface of semiconductor wafers to test the integrity of such oxide layers and to cause the early failure of imperfect oxide layers comprising the steps of, immersing the wafers in a low pressure plasma of high density established between the wafer and a cathode, increasing the potential between said cathode and said wafers to impress across the oxide an electric field of between 1 X 106 volts/cm and 4 X 106 volts/cm and maintaining said electric field across the oxide for a period of time to cause the breakdown of oxides containing imperfections, and inspecting said wafers to determine imperfections in said oxide layer caused by said field.
Claim 12
Independent Claim
116 words
A method of stressing oxide layers on the surface of semiconductor wafers to test the integrity of such oxide layers and to cause the early failure of imperfect oxide layers comprising the steps of, immersing the wafers in a low pressure plasma of high density established between the wafer and a cathode, increasing the potential between said cathode and said wafers to impress across the oxide an electric field of between 1 X 106 volts/cm and 4 X 106 volts/cm and maintaining said electric field across the oxide for a period of time to cause the breakdown of oxides containing imperfections, and inspecting said wafers to determine imperfections in said oxide layer caused by said field.
Claim 13
Independent Claim
240 words
A method for assessing the integrity of each oxide layer on a semiconductor having a plurality of discrete oxide layers thereon comprising the steps of, placing a semiconductor, having a plurality of discrete oxide layers on a surface thereof, on a support within a closed chamber, said support being disposed between a cathode and an anode within said chamber, evacuating said chamber to less than 5 X 10 6 torr, introducing 1 - 10 microns of an inert gas capable of supporting a glow discharge into said chamber, said gas being selected from the group consisting of nitrogen, the noble gases and mixtures thereof, heating said semiconductor material to a temperature of between 70*C and 250*C, inpressing a voltage potential between said anode and said cathode to create a glow discharge in said gas within said chamber, impressing a magnetic field on said semiconductor normal to the semiconductor surface having the oxide layer thereon, and modifying the voltage between the cathode and anode to impress an electric field of between 1 X 106 volts/cm and 4 X 106 volts/cm across said oxide layers to cause failures to occur, in less than 1 hour, in those oxide layers which contain potential defects which would under normal conditions cause the oxide layers to fail during the first few hundred hours of operation without creating a deleterious affect in those oxides which do not contain inherent defects that would cause early oxide failure.
Claim 14
Independent Claim
240 words
A method for assessing the integrity of each oxide layer on a semiconductor having a plurality of discrete oxide layers thereon comprising the steps of, placing a semiconductor, having a plurality of discrete oxide layers on a surface thereof, on a support within a closed chamber, said support being disposed between a cathode and an anode within said chamber, evacuating said chamber to less than 5 X 10 6 torr, introducing 1 - 10 microns of an inert gas capable of supporting a glow discharge into said chamber, said gas being selected from the group consisting of nitrogen, the noble gases and mixtures thereof, heating said semiconductor material to a temperature of between 70*C and 250*C, inpressing a voltage potential between said anode and said cathode to create a glow discharge in said gas within said chamber, impressing a magnetic field on said semiconductor normal to the semiconductor surface having the oxide layer thereon, and modifying the voltage between the cathode and anode to impress an electric field of between 1 X 106 volts/cm and 4 X 106 volts/cm across said oxide layers to cause failures to occur, in less than 1 hour, in those oxide layers which contain potential defects which would under normal conditions cause the oxide layers to fail during the first few hundred hours of operation without creating a deleterious affect in those oxides which do not contain inherent defects that would cause early oxide failure.
Claim 15
Independent Claim
160 words
An apparatus for applying a stressing voltage to oxides formed on the surface of a semiconductor wafer comprising in combination, a closed chamber, a base plate for supporting said chamber, means for evacuating said chamber, means for admitting an ionizable gas into the chamber, anode means for supporting a semiconductor wafer having an oxide layer on a surface thereof within the chamber so that the wafer is substantially at the same potential as said anode, cathode means within said chamber and spaced apart from said anode a pre-determining distance, means for heating the wafer supported on said anode to a temperature of at least 125*C, magnetic means surrounding said chamber for imposing a magnetic field normal to a wafer supported on said anode, and means coupled to said cathode for establishing a glow discharge between said anode and said cathode and for impressing an electrical field of between 1 X 106 volts/cm and 4 X 106 volts/cm across said oxide.
Claim 16
Independent Claim
160 words
An apparatus for applying a stressing voltage to oxides formed on the surface of a semiconductor wafer comprising in combination, a closed chamber, a base plate for supporting said chamber, means for evacuating said chamber, means for admitting an ionizable gas into the chamber, anode means for supporting a semiconductor wafer having an oxide layer on a surface thereof within the chamber so that the wafer is substantially at the same potential as said anode, cathode means within said chamber and spaced apart from said anode a pre-determining distance, means for heating the wafer supported on said anode to a temperature of at least 125*C, magnetic means surrounding said chamber for imposing a magnetic field normal to a wafer supported on said anode, and means coupled to said cathode for establishing a glow discharge between said anode and said cathode and for impressing an electrical field of between 1 X 106 volts/cm and 4 X 106 volts/cm across said oxide.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-03-11 | 1977-09-10 | 1978-03-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-03-11 | 1981-09-10 | 1982-03-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-03-11 | 1985-09-10 | 1986-03-12 | $7700.00 | Window Closed / Lapsed |