US3794979A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Microprogrammed control unit with means for reversing and complementing microinstructions
Assignee: International Business Machines Corp
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Filing: 1973-03-02
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Granted: 1974-02-26
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Expires: 1993-03-02
Abstract
Abstract A microprogrammed control unit comprising an instruction memory for storing microinstructions and an address memory for storing the addresses of microinstructions which make up a microprogram. Each microinstruction within the instruction memory can be transmitted to an instruction data register in any of various formats. In the preferred embodiment, the microinstruction can be in one of four forms: unchanged; reversed; complemented; or reversed and complemented. Since each microinstruction within the instruction memory can be transmitted to the data register in any of these four forms, the number of microinstructions that must be stored in the instruction memory is substantially reduced.
Inventors
- 👤 R Mcmahon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 18:40
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/22; G06F9/223
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
288 words
For use in a data processing system, a micro-program control unit comprising: an instruction store for storing a plurality of microinstructions; instruction store addressing means for addressing said instruction store; instruction store output means for holding a micro-instruction; logical manipulation means connected between said instruction store and said instruction store output means for selectively altering the format of a microinstruction read from said instruction store, thereby changing it to a different microinstruction; an address store for storing a plurality of words each containing the address of a microinstruction in said instruction store and a control field containing at least one control bit identifying the manner in which said logical manipulation means is to alter the format of a microinstruction; address store addressing means for addressing said address store; address store output means for holding data read from said address store; means responsive to an address in said address store addressing means to cause a word to be read from said address store; means for causing an adDress in said word to be transmitted to said instruction store addressing means; means for causing a control field related to said last-named address to be transmitted to said address store output means; means responsive to the address in said instruction store addressing means to cause a microinstruction to be read from said instruction store to said logical manipulation means; means connected between said address store output means and said logical manipulation means for transmitting to the latter a representation of said control field; said logical manipulation means selectively altering the format of a microinstruction in accordance with said representation; and means for transmitting the altered microinstruction to said instruction store output means for controlling the operation of said data processing system.
Claim 2
Dependent Claim
288 words
For use in a data processing system, a micro-program control unit comprising: an instruction store for storing a plurality of microinstructions; instruction store addressing means for addressing said instruction store; instruction store output means for holding a micro-instruction; logical manipulation means connected between said instruction store and said instruction store output means for selectively altering the format of a microinstruction read from said instruction store, thereby changing it to a different microinstruction; an address store for storing a plurality of words each containing the address of a microinstruction in said instruction store and a control field containing at least one control bit identifying the manner in which said logical manipulation means is to alter the format of a microinstruction; address store addressing means for addressing said address store; address store output means for holding data read from said address store; means responsive to an address in said address store addressing means to cause a word to be read from said address store; means for causing an adDress in said word to be transmitted to said instruction store addressing means; means for causing a control field related to said last-named address to be transmitted to said address store output means; means responsive to the address in said instruction store addressing means to cause a microinstruction to be read from said instruction store to said logical manipulation means; means connected between said address store output means and said logical manipulation means for transmitting to the latter a representation of said control field; said logical manipulation means selectively altering the format of a microinstruction in accordance with said representation; and means for transmitting the altered microinstruction to said instruction store output means for controlling the operation of said data processing system.
Claim 3
Dependent Claim
72 words
The microprogram control unit of claim 1 wherein: said instruction store also stores, for each of said microinstructions, a group of parity bits related thereto; and said logical manipulation means further comprises means for altering the format of a group of parity bits in a manner related to the alteration of the related microinstruction so that the group of parity bits, after alteration, will correctly represent the parity of said different microinstruction.
Claim 4
Dependent Claim
24 words
The microprogram control unit of claim 1 wherein said logical manipulation means comprises: reversing means for reversing the order of bits within a microinstruction.
Claim 5
Dependent Claim
21 words
The microprogram control unit of claim 1 wherein said logical manipulation means comprises: complementing means for complementing bits of a microinstruction.
Claim 6
Dependent Claim
53 words
The microprogram control unit of claim 1 wherein said logical manipulation means comprises: first means for selectively performing a first alteration of a microinstruction; and second means for selectively performing a second alteration of the same microinstruction; both said first and second alterations being in accordance with said representation of said control field.
Claim 7
Dependent Claim
72 words
The microprogram control unit of claim 5 wherein: said instruction store also stores, for each of said microinstructions, a group of parity bits related thereto; and said logical manipulation means further comprises means for altering the format of a group of parity bits in a manner related to the alteration of the related microinstruction so that the group of parity bits, after alteration, will correctly represent the parity of said different microinstruction.
Claim 8
Dependent Claim
24 words
The microprogram control unit of claim 5 wherein: one of said first and second means comprises complementing means for complementing bits of a microinstruction.
Claim 9
Dependent Claim
27 words
The microprogram control unit of claim 5 wherein: one of said first and second means comprises reversing means for reversing the order of bits within a microinstruction.
Claim 10
Dependent Claim
25 words
The microprogram control unit of claim 8 wherein: the other of said first and second means comprises complementing means for complementing bits of a microinstruction.
Claim 11
Dependent Claim
72 words
The microprogram control unit of claim 9 wherein: said instruction store also stores, for each of said microinstructions, a group of parity bits related thereto; and said logical manipulation means further comprises means for altering the format of a group of parity bits in a manner related to the alteration of the related microinstruction so that the group of parity bits, after alteration, will correctly represent the parity of said different microinstruction.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-02-25 | 1977-08-27 | 1978-02-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-02-25 | 1981-08-27 | 1982-02-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-02-25 | 1985-08-27 | 1986-02-26 | $7700.00 | Window Closed / Lapsed |