US3794858A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Off delay timer and ptc sensing circuit
Assignee: Texas Instruments Inc
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Filing: 1972-12-13
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Granted: 1974-02-26
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Expires: 1992-12-13
Abstract
Abstract The disclosure relates to a timing circuit for use in conjunction with a protection circuit wherein, under normal operation, the timing circuit is isolated from the protection circuit. Upon sensing of an alarm condition by the protection circuit, the timing circuit is activated and prevents the protection circuit from again becoming operable and allowing power to be supplied to the protective device for a predetermined time period as set by the parameters of the timing circuit. This prevents the reapplication of power to the protected device as soon as the alarm condition has been removed.
Inventors
- 👤 D Squiers
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 19:06
CPC Classifications
H; H02; H02H; H02H3/00; H02H3/02; H02H3/06; H02H3/027
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
236 words
An off delay timing circuit for use in conjunction with a control circuit, which comprises: a. control means for controlling the application of power to an external device, said control means having two operating states, said control means normally operating in one of said two operating states, b. said control means including means responsive to a predetermined condition to cause said control means to operate in the other of its two operating states including a voltage divider, said voltage divier comprising a condition responsive element serially connected to a first resistive element, whereby the operating state of said control means is determined by the voltage at the junction of said condition responsive element and said first resistive element, and c. delay means, normally electrically isolated from said control means, responsive to said means responsive to a predetermined condition sensing said predetermined condition, for inhibiting said means responsive to a predetermined condition from causing said control means to operate in said one of said two operating states for a predetermined time, said delay means including a diode, said diode being reverse biased when sai control means is operating in said one operating state and forward biased when said control means is operating in the other of its two operating states, and a second resistive element coupled to said diode, said first resistive element being connected in parallel with the combination of said diode and second resistive element.
Claim 2
Dependent Claim
236 words
An off delay timing circuit for use in conjunction with a control circuit, which comprises: a. control means for controlling the application of power to an external device, said control means having two operating states, said control means normally operating in one of said two operating states, b. said control means including means responsive to a predetermined condition to cause said control means to operate in the other of its two operating states including a voltage divider, said voltage divier comprising a condition responsive element serially connected to a first resistive element, whereby the operating state of said control means is determined by the voltage at the junction of said condition responsive element and said first resistive element, and c. delay means, normally electrically isolated from said control means, responsive to said means responsive to a predetermined condition sensing said predetermined condition, for inhibiting said means responsive to a predetermined condition from causing said control means to operate in said one of said two operating states for a predetermined time, said delay means including a diode, said diode being reverse biased when sai control means is operating in said one operating state and forward biased when said control means is operating in the other of its two operating states, and a second resistive element coupled to said diode, said first resistive element being connected in parallel with the combination of said diode and second resistive element.
Claim 3
Dependent Claim
23 words
An off delay timing circuit as set forth in claim 1 wherein said means responsive to a predetermined condition includes a PTC device.
Claim 4
Dependent Claim
58 words
An off delay timing circuit as set forth in claim 1 wherein said delay means includes a normally charged capacitor, means responsive to sensing of said predetermined condition to cause said capacitor to discharge at a predetermined rate and means responsive to a predetermined state of discharge of said capacitor for permitting said diode to be reverse biased.
Claim 5
Dependent Claim
68 words
An off delay timing circuit as set forth in claim 1 further including a source of electrical power coupled across both said control means and said delay means, said delay means also being responsive to the removal of said power for inhibiting said means responsive to a predetermined condition from causing said control means to operate in said one of said two operating states for said predetermined time.
Claim 6
Dependent Claim
68 words
An off delay timing circuit as set forth in claim 5 further including a source of electrical power coupled across both said control meaNs and said delay means, said delay means also being responsive to the removal of said power for inhibiting said means responsive to a predetermined condition from causing said control means to operate in said one of said two operating states for said predetermined time.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-02-25 | 1977-08-27 | 1978-02-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-02-25 | 1981-08-27 | 1982-02-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-02-25 | 1985-08-27 | 1986-02-26 | $7700.00 | Window Closed / Lapsed |