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US3793581A Expired / Lapsed US ⏱️ 0.0 years remaining

Solid state phase controlled switch

Assignee: United States Department of the Navy
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Filing: 1972-04-19
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Granted: 1974-02-19
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Expires: 1992-04-19
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Abstract

Abstract A phase controlled switch connects a load to an A.C. power source at a particular phase angle of the power source. A first trigger signal referenced to a zero crossing region of the wave form is obtained. This first signal starts a timer which in turn generates a second signal. The variable timer can be preset to produce a delayed signal over a full period of the A.C. wave form. A latching switch system responsive to the timing signal connects the load to the power supply and holds the load connected until the power supply is physically disconnected from the load.

Inventors

  • 👤 H Ortgies

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 08:41
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/12; G05F1/40; G05F1/44; G05F1/445

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 141 words
A phase controlled switch comprising: first means connected to an A.C. power source for generating a first signal coincident with a first predetermined phase angle of said A.C. source; a second means connected to said first means for generating a signal responsive to said first signal and delayed in time with respect to said first signal; and a switch means connected to said second means and responsive to said second signal for connecting a load to the A.C. source coincident with a second predetermined phase angle of said A.C. source and for holding said load connected to said A.C. source until and only until said A.C. source is physically disconnected from said load; wherein said first and second predetermined phase angles are independent of the amplitude of said A.C. source and are predetermined before the switching on of said A.C. source.
Claim 2
Dependent Claim 141 words
A phase controlled switch comprising: first means connected to an A.C. power source for generating a first signal coincident with a first predetermined phase angle of said A.C. source; a second means connected to said first means for generating a signal responsive to said first signal and delayed in time with respect to said first signal; and a switch means connected to said second means and responsive to said second signal for connecting a load to the A.C. source coincident with a second predetermined phase angle of said A.C. source and for holding said load connected to said A.C. source until and only until said A.C. source is physically disconnected from said load; wherein said first and second predetermined phase angles are independent of the amplitude of said A.C. source and are predetermined before the switching on of said A.C. source.
Claim 3
Dependent Claim 31 words
The switch of claim 1, wherein: said first means includes a half wave rectifier and a clipper for producing a half wave rectified and clipped wave form from said A.C. source.
Claim 4
Dependent Claim 47 words
The switch of claim 2 wherein: said first signal generated by said first means is coincident with the phase angle defined by the zero cross of the descending edge of said clipped wave form; and said wave form is clipped to produce a substantially squared wave form.
Claim 5
Dependent Claim 31 words
The switch of claim 3, wherein: said second means is a variable timing circuit for producing said second signal delayed over a time range emcompassing a period of said A.C. source.
Claim 6
Dependent Claim 60 words
The switch of claim 4, wherein: said first means includes a first unijunction transistor; a storage means connected between the emitter of said first unijunction transistor and ground for temporarily holding the voltage of the clipped wave form to fire said first unijunction transistor; and means for generating a first trigger signal responsive to said first unijunction transistor being fired.
Claim 7
Dependent Claim 87 words
The switch of claim 5, wherein: said timing means is a second unijunction transistor; a variable resistor connected at one end to the emitter of said second unijunction transistor and connected at its other end to receive said triggering signal; a storage means connected between the emitter of said second unijunction transistor and ground; and said timing unijunction transistor being triggered and generating said delayed signal when said storage means connected to the emitter at said second unijunction transistor reaches the said second unijunction transistor firing voltage.
Claim 8
Dependent Claim 64 words
The switch of claim 6, wherein: said switch means includes means responsive to said delayed signal for producing two switching signals; each of said two switching signals being connected to respective latching gates; and said latching gates being turned on in response to said switching signals and being held on independent of said A.C. wave form for connecting said power source to the load.
Claim 9
Dependent Claim 52 words
The switch of claim 7, wherein: said means for generating a first trigger signal is a SCR connected to said first unijunction transistor; and said SCR connecting said variable resistor to a D.C. voltage source for triggering said second unijunction transistor in response to said firing signal from said first unijunction transistor.
Claim 10
Dependent Claim 101 words
The switch of claim 8, wherein: said latching gates are a first pair of SCRs; and said switch means further including: a second pair of SCRs, the anodes of each of said second pair of SCRs being connected between a respective side of said power source and the cathodes of each of said second pair of SCRs being connected to one side of said load for connecting said load to said power source; and said second pair of SCRs being turned on and connecting said load to said source in response to said first pair of latching SCRs being turned on.

References Cited (Backward Citations)

US3229111A Cited
US3252010A Cited
US3487292A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-02-18 1977-08-20 1978-02-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-02-18 1981-08-20 1982-02-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-02-18 1985-08-20 1986-02-19 $7700.00 Window Closed / Lapsed

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