US3790809A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Mos memory power supply
Assignee: AG Communication Systems Corp
•
Filing: 1972-09-25
•
Granted: 1974-02-05
•
Expires: 1992-09-25
Abstract
Abstract An MOS memory power supply system including voltage monitoring and sequencing circuits to properly control voltage levels during turn-on, turn-off and fault detection. A first voltage monitoring circuit for measuring the 16 volt output of a regulated power supply, a second voltage monitoring circuit for measuring the 20 volt output of a regulated power supply, the monitor circuits including means for detecting a deviation of the respective output voltage levels from a predetermined range and providing a fault signal, a ramp signal generator providing a signal starting from approximately zero and continuously increasing in level whenever a fault is detected, respective crowbar circuits for the 16 volt and 20 volt output terminals, the 16 volt and 20 volt crowbar circuits including respective means for shorting the output levels at different ramp signal levels, the 16 volt output shorted prior to shorting of the 20 volt output level. An inhibit circuit is also provided for responding to a fault signal from the 20 volt monitor circuit and inhibiting the formation of the 16 volt output level thus insuring that the 20 volt output is always greater than the 16 volt output.
Inventors
- 👤 K Kuster
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 04:04
CPC Classifications
H; H02; H02H; H02H9/00; H02H9/04; H02H9/041; H02H3/00; H02H3/20; H02H3/202
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
318 words
In an MOS memory power supply system having a first power source providing a first output voltage level at its output terminals; a second power source providing a second output voltage level at its output terminals, said first voltage level being less than said second voltage level, said power sources including means for preventing damage to said power sources during shorting of said output terminals, the improvement comprising; a first voltage monitor circuit coupled to said first output terminals for measuring said first output voltage level, including means for detecting a deviation of said first output voltage level from a predetermined range and providing a fault signal; a second voltage monitor circuit coupled to said second output terminals for measuring said second output voltage level, including means for detecting a deviation of said second output voltage level from a predetermined range and providing a fault signal; a ramp signal generator means responsive to said fault signals from said voltage monitor circuits for generating a ramp signal having increasing voltage levels; a first crowbar circuit means coupled to said first output terminals for shorting said terminals; said first crowbar circuit means including a first preset firing voltage level device for shorting said first output terminals; a second crowbar circuit means coupled to said second output terminals for shorting said terminals; said second crowbar circuit means including a second preset firing voltage level device for shorting said second output terminals; said first and second crowbar circuit means each including sequential firing means responsive to said ramp signal having increasing voltage levels for firing said first preset firing voltage level device and crowbarring said first output terminals prior to firing said second preset firing voltage level device and crowbarring said second outpuT terminals; and inhibit circuit means coupled to said first power source and responsive to one of said fault signals for inhibiting the formation of said first output voltage level.
Claim 2
Dependent Claim
318 words
In an MOS memory power supply system having a first power source providing a first output voltage level at its output terminals; a second power source providing a second output voltage level at its output terminals, said first voltage level being less than said second voltage level, said power sources including means for preventing damage to said power sources during shorting of said output terminals, the improvement comprising; a first voltage monitor circuit coupled to said first output terminals for measuring said first output voltage level, including means for detecting a deviation of said first output voltage level from a predetermined range and providing a fault signal; a second voltage monitor circuit coupled to said second output terminals for measuring said second output voltage level, including means for detecting a deviation of said second output voltage level from a predetermined range and providing a fault signal; a ramp signal generator means responsive to said fault signals from said voltage monitor circuits for generating a ramp signal having increasing voltage levels; a first crowbar circuit means coupled to said first output terminals for shorting said terminals; said first crowbar circuit means including a first preset firing voltage level device for shorting said first output terminals; a second crowbar circuit means coupled to said second output terminals for shorting said terminals; said second crowbar circuit means including a second preset firing voltage level device for shorting said second output terminals; said first and second crowbar circuit means each including sequential firing means responsive to said ramp signal having increasing voltage levels for firing said first preset firing voltage level device and crowbarring said first output terminals prior to firing said second preset firing voltage level device and crowbarring said second outpuT terminals; and inhibit circuit means coupled to said first power source and responsive to one of said fault signals for inhibiting the formation of said first output voltage level.
Claim 3
Dependent Claim
65 words
The improvement of claim 1, wherein said ramp signal generator means comprises: a first generator means responsive to a fault signal from said first voltage monitor circuit for providing a first ramp signal having a continuously increasing slope; and a second generator means responsive to a fault signal from said second voltage monitor circuit for providing a second ramp signal having a continuously increasing slope.
Claim 4
Dependent Claim
36 words
The improvement of claim 2, including means for coupling said first and second ramp signals to provide a composite ramp signal having a composite continuously increasing slope steeper than either of said first or second slopes.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-02-04 | 1977-08-06 | 1978-02-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-02-04 | 1981-08-06 | 1982-02-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-02-04 | 1985-08-06 | 1986-02-05 | $7700.00 | Window Closed / Lapsed |