Pulse analyzing tester

Claim 2

A test instrument including: an amplitude discriminator, an upper buffer and a lower buffer, gating means disposed between said amplitude discriminator and said upper and lower buffers for selectively connecting said amplitude discriminator to the lower buffer only or to both said upper and lower buffers, control means connected to said gating means for controlling the selection of the lower buffer only or both the upper and lower buffers, first display means connected to said upper buffer for providing a visual display of the content of said upper buffer, second display means connected to said lower buffer for making a visual presentation of the content of said lower buffer.

Claim 3

A test instrument including: a plurality of amplitude discriminators, an upper buffer and a lower buffer, selection means connected to said plurality of amplitude discriminators, gating means connected to said selection means, said gating means being connected to said upper and said lower buffer, a display device connected to said upper buffer and said lower buffer for providing a visual presentation of the content of the upper and lower buffers.

Claim 4

A test instrument including: a plurality of amplitude discriminators, an upper buffer and a lower buffer, selection means connected to said plurality of amplitude discriminators, gating means connected to said selection means, said gating means being connected to said upper and said lower buffer, a display device connected to said upper buffer and said lower buffer for providing a visual presentation of the content of the upper and lower buffers.

Claim 5

A test instrument including: a plurality of amplitude discriminators, an upper buffer and a lower buffer, selection means connected to said plurality of amplitude discriminators for selecting said amplitude discriminators, gating means connected between said selection means and said upper and lower buffers, an oscillator connected to said gating means, first control means connected to said oscillator for operating said oscillator to provide a specified number of signals to said gating means, a display device connected to said upper buffer and said lower buffer for making a visual presentation of the content of said upper and lower buffers.

Claim 6

A test instrument including: a plurality of amplitude discriminators, an upper buffer and a lower buffer, selection means connected to said plurality of amplitude discriminators for selecting said amplitude discriminators, gating means connected between said selection means and said upper and lower buffers, an oscillator connected to said gating means, first control means connected to said oscillator for operating said oscillator to provide a specified number of signals to said gating means, a display device connected to said upper buffer and said lower buffer for making a visual presentation of the content of said upper and lower buffers.

Claim 7

A test instrument for analyzing signals, said test instrument including: a plurality of amplitute discriminators, a device under test connected to said amplitude discriminators, an upper buffer and a lower buffer, gating and control circuit means connected between said plurality of amplitude discriminators and said upper buffer and said lower buffer, a display device connected to the upper buffer and the lower buffer for making a visual presentation of the content of the upper buffer and the lower buffer, comparator means connected to the upper buffer and the lower buffer for comparing the content of the upper bUffer with the content of the lower buffer, and means connecting said comparator to said gating and control circuit means and the device under test whenever a predetermined condition is detected in the upper buffer and the lower buffer.

Claim 8

A test instrument for analyzing signals, said test instrument including: a plurality of amplitute discriminators, a device under test connected to said amplitude discriminators, an upper buffer and a lower buffer, gating and control circuit means connected between said plurality of amplitude discriminators and said upper buffer and said lower buffer, a display device connected to the upper buffer and the lower buffer for making a visual presentation of the content of the upper buffer and the lower buffer, comparator means connected to the upper buffer and the lower buffer for comparing the content of the upper bUffer with the content of the lower buffer, and means connecting said comparator to said gating and control circuit means and the device under test whenever a predetermined condition is detected in the upper buffer and the lower buffer.

Claim 9

The apparatus of claim 4 wherein said gating and control circuit means includes first control means connected to the display device which blanks said display device at all times except when information signals are supplied to said test instrument.

Claim 10

The apparatus of claim 4 wherein signal delay means is connected between said amplitude discriminators and said upper and lower buffers.

Claim 11

The apparatus of claim 4 wherein said gating and control circuit means includes second control means which is selectively operated to inhibit operation of the upper buffer whereby a reference pattern may be stored therein and remain undisturbed.

Claim 12

A test instrument for analyzing signals, said test instrument including: a plurality of amplitude discrimiantors each having an input and an output, a device under test connected to supply signals to the input of said amplitude discriminators, each amplitude discriminator having an adjustable clipping level, first selection means connected to the output of said amplitude discriminators for selecting at least one of said amplitude discriminators, an upper buffer having a plurality of stages and a lower buffer plurality having a plurality of stages, gating means connected between said selection means and each stage of the upper buffer and each stage of the lower buffers an oscillator, a ring circuit having a plurality of stages, said oscillator being connected to said ring circuit, successive stages of said ring circuit being connected to the gating means of associated successive stages of the upper and lower buffers, a variable delay generator, second selection means connected between said plurality of amplitude discriminators and said variable delay generator for connecting a selected one of said amplitude discriminators to said variable delay generator, first control means connected between said variable delay generator and said oscillator, said variable delay generator responding to signals from a selected amplitude discriminator and subsequently operating said first control means to trigger said oscillator into operation, said oscillator providing signals to operate said ring circuit through one cycle of operation thereby to provide one sweep during which successive stages of said ring circuit operating said gating means thereby to sample the incoming signal at successive points and store the results in successive stages of the upper and lower buffers whereby data signals in different successive sample periods or time windows are stored in different stages of the upper and lower buffers, second control means connected between the ring circuit and the first control means for turning off the oscillator at the end of each sweep, a display device including an upper row of display elements and a lower row of display elements, means connecting the stages of the upper buffer to corresponding display elements in the upper row of display elements, and means connecting the stages of the lower buffer to corresponding display elements in the lower row of display elements, whereby the content of the upper buffer is visually displayed by the upper row of display elements and the content of the lower buffer is visually displayed by the lower row of display elements, comparator means connected between the stages of the upper buffer and the stages of the lower buffer, a first control latch, said comparator means being connected to the first control latch, said first control latch being operated by said comparator to indicate the result of the comparison, and a second control latch, third selection means connected to said second control latch, means connecting said first control latch to said third selection means, means connecting given ones of said amplitude discriminators To said third selection means, said third selection means being selectively operated to permit said second control latch to be operated by said first control latch or any selected one of said given amplitude discriminators, said second control latch being connected to said device under test and said first control means, whereby said second latch may be operated to signal the device under test and inhibit further triggering of the oscillator thereby to terminate operation of the test instrument at the end of such sweep.

Claim 13

A test instrument for analyzing signals, said test instrument including: a plurality of amplitude discrimiantors each having an input and an output, a device under test connected to supply signals to the input of said amplitude discriminators, each amplitude discriminator having an adjustable clipping level, first selection means connected to the output of said amplitude discriminators for selecting at least one of said amplitude discriminators, an upper buffer having a plurality of stages and a lower buffer plurality having a plurality of stages, gating means connected between said selection means and each stage of the upper buffer and each stage of the lower buffers an oscillator, a ring circuit having a plurality of stages, said oscillator being connected to said ring circuit, successive stages of said ring circuit being connected to the gating means of associated successive stages of the upper and lower buffers, a variable delay generator, second selection means connected between said plurality of amplitude discriminators and said variable delay generator for connecting a selected one of said amplitude discriminators to said variable delay generator, first control means connected between said variable delay generator and said oscillator, said variable delay generator responding to signals from a selected amplitude discriminator and subsequently operating said first control means to trigger said oscillator into operation, said oscillator providing signals to operate said ring circuit through one cycle of operation thereby to provide one sweep during which successive stages of said ring circuit operating said gating means thereby to sample the incoming signal at successive points and store the results in successive stages of the upper and lower buffers whereby data signals in different successive sample periods or time windows are stored in different stages of the upper and lower buffers, second control means connected between the ring circuit and the first control means for turning off the oscillator at the end of each sweep, a display device including an upper row of display elements and a lower row of display elements, means connecting the stages of the upper buffer to corresponding display elements in the upper row of display elements, and means connecting the stages of the lower buffer to corresponding display elements in the lower row of display elements, whereby the content of the upper buffer is visually displayed by the upper row of display elements and the content of the lower buffer is visually displayed by the lower row of display elements, comparator means connected between the stages of the upper buffer and the stages of the lower buffer, a first control latch, said comparator means being connected to the first control latch, said first control latch being operated by said comparator to indicate the result of the comparison, and a second control latch, third selection means connected to said second control latch, means connecting said first control latch to said third selection means, means connecting given ones of said amplitude discriminators To said third selection means, said third selection means being selectively operated to permit said second control latch to be operated by said first control latch or any selected one of said given amplitude discriminators, said second control latch being connected to said device under test and said first control means, whereby said second latch may be operated to signal the device under test and inhibit further triggering of the oscillator thereby to terminate operation of the test instrument at the end of such sweep.

Claim 14

The apparatus of claim 8 wherein the first control means includes a third control latch which is set by signals from the second selection means to trigger the oscillator on and is reset by signals from the second control means to turn off the oscillator at the end of each sweep.

Claim 15

The apparatus of claim 8 wherein each amplitude discriminator has an output switch which may be operated to supply normal or inverted output signals to the first selection means.

Claim 16

The apparatus of claim 8 wherein the first control latch includes switch means which permits the first control latch to be set by the comparator means for a match or mismatch condition between the signals stored in the upper and lower buffers.

Claim 17

The apparatus of claim 8 wherein the first selection means is operated to select two amplitude discriminators and signals from one amplitude discriminator are stored in the upper buffer and displayed in the upper row of display elements, and signals from the other amplitude discriminator are stored in the lower buffer and displayed in the lower row of display elements.

Claim 18

The apparatus of claim 8 further including image control means connected to the display device, and said image control including third control means for selectively operating said display device to be unblanked at all times, to be blanked at all times, or to be automatically blanked at all times except during a sweep.

Claim 19

The apparatus of claim 13 wherein the image control means further includes fourth control means for extending the time of operation of the display device at the end of each sweep whenever the image control means is operated by the third control means to blank the display automatically at the end of each sweep whereby visual persistence of the display elements may be extended to permit viewing by an operator after a high speed sweep.

Claim 20

The apparatus of claim 8 wherein a pair of run indicators are connected to the oscillator with each run indicator being energized alternately with signals from the oscillator, said run indicators being lighted with equally intensity when the oscillator signals are symmetrical or equal in duration and being lighted with different intensities when the oscillator signal are unsymmetrical or different in duration.

Claim 21

The apparatus of claim 8 further including third control means connected to the gating means and the ring circuit which permits signals from a selected amplitude discriminator to be stored in the stages of the upper buffer during one sweep and thereafter inhibits operation of the stages of the upper buffer whereby signal stored in the upper buffer are preserved as a reference pattern which is thereafter compared with incoming signals stored in the lower buffer during each subsequent sweep.

Claim 22

A test instrument for analyzing signals, said test instrument including: a plurality of amplitude discriminators each having an input and an output, a device under test connected to supply signals to the input of said amplitude discriminators, each amplitude discriminator having an adjustable clipping level, first selection means connected to the output of said amplitude discriminators for selecting at least one of said amplitude discriminators, an upper buffer having a plurality of stages and a lower buffer plurality having a plurality of stages, gating means connected between said selection means and each stage of the upper buffer and each stage of the lower buffers, an oscillatoR, a ring circuit having a plurality of stages, said oscillator being connected to said ring circuit, successive stages of said ring circuit being connected to the gating means of associated successive stages of the upper and lower buffers, second selection means connected to said plurality of amplitude discriminators for selecting any one of said amplitude discriminators for a triggering operation, first control means connected between said second selection means and said oscillator, said first control means responding to signals equal to or greater than the clipping level of any selected amplitude discriminator to trigger said oscillator into operation, said oscillator providing signals to operate said ring circuit through one cycle of operation thereby to provide one sweep during which successive stages of said ring circuit operating said gating means thereby to sample the incoming signal at successive points and store the results in successive stages of the upper and lower buffers whereby data signals in different successive sample periods or time windows are stored in different stages of the upper and lower buffers, second control means connected between the ring circuit and the first control means for turning off the oscillator at the end of each sweep, a display device including an upper row of display elements and a lower row of display elements, means connecting the stages of the upper buffer to corresponding display elements in the upper row of display elements, and means connecting the stages of the lower buffer to corresponding display elements in the lower row of display elements, whereby the content of the upper buffer is visually displayed by the upper row of display elements and the content of the lower buffer is visually displayed by the lower row of display elements, comparator means connected between the stages of the upper buffer and the stages of the lower buffer, a first control latch, said comparator means being connected to the first control latch, said first control latch being operated by said comparator to indicate the result of the comparison, and a second control latch, third selection means connected to said second control latch, means connecting said first control latch to said third selection means, means connecting given ones of said amplitude discriminators to said third selection means, said third selection means being selectively operated to permit said second control latch to be operated by said first control latch or any selected one of said given amplitude discriminators, said second control latch being connected to said device under test and said first control means, whereby said second latch may be operated to signal the device under test and inhibit further triggering of the oscillator thereby to terminate operation of the test instrument at the end of such sweep.

Claim 23

A test instrument for analyzing signals, said test instrument including: a plurality of amplitude discriminators each having an input and an output, a device under test connected to supply signals to the input of said amplitude discriminators, each amplitude discriminator having an adjustable clipping level, first selection means connected to the output of said amplitude discriminators for selecting at least one of said amplitude discriminators, an upper buffer having a plurality of stages and a lower buffer plurality having a plurality of stages, gating means connected between said selection means and each stage of the upper buffer and each stage of the lower buffers, an oscillatoR, a ring circuit having a plurality of stages, said oscillator being connected to said ring circuit, successive stages of said ring circuit being connected to the gating means of associated successive stages of the upper and lower buffers, second selection means connected to said plurality of amplitude discriminators for selecting any one of said amplitude discriminators for a triggering operation, first control means connected between said second selection means and said oscillator, said first control means responding to signals equal to or greater than the clipping level of any selected amplitude discriminator to trigger said oscillator into operation, said oscillator providing signals to operate said ring circuit through one cycle of operation thereby to provide one sweep during which successive stages of said ring circuit operating said gating means thereby to sample the incoming signal at successive points and store the results in successive stages of the upper and lower buffers whereby data signals in different successive sample periods or time windows are stored in different stages of the upper and lower buffers, second control means connected between the ring circuit and the first control means for turning off the oscillator at the end of each sweep, a display device including an upper row of display elements and a lower row of display elements, means connecting the stages of the upper buffer to corresponding display elements in the upper row of display elements, and means connecting the stages of the lower buffer to corresponding display elements in the lower row of display elements, whereby the content of the upper buffer is visually displayed by the upper row of display elements and the content of the lower buffer is visually displayed by the lower row of display elements, comparator means connected between the stages of the upper buffer and the stages of the lower buffer, a first control latch, said comparator means being connected to the first control latch, said first control latch being operated by said comparator to indicate the result of the comparison, and a second control latch, third selection means connected to said second control latch, means connecting said first control latch to said third selection means, means connecting given ones of said amplitude discriminators to said third selection means, said third selection means being selectively operated to permit said second control latch to be operated by said first control latch or any selected one of said given amplitude discriminators, said second control latch being connected to said device under test and said first control means, whereby said second latch may be operated to signal the device under test and inhibit further triggering of the oscillator thereby to terminate operation of the test instrument at the end of such sweep.

Claim 24

The apparatus of claim 17 wherein the first control means includes a third control latch which is set by signals from the second selection means to trigger the oscillator on and is reset by signals from the second control means to turn off the oscillator at the end of each sweep.

Claim 25

The apparatus of claim 17 wherein each amplitude discriminator has an output switch which may be operated to supply normal or inverted output signals to the first selection means.

Claim 26

The apparatus of claim 17 wherein the first control latch includes swtich means which permits the first control latch to be set by the comparator means for a match or mismatch condition between the signals stored in the upper and lower buffers.

Claim 27

The apparatus of claim 17 wherein the first selection means is operated to select two amplitude discriminators and signals from one amplitude discriminator are stored in the upper buffer and displayed in the upper row of display elements and signals from the other amplitude discriminator are stored in the lower buffer and displayed in the lower row of display elements.

Claim 28

The apparatus of claim 17 further including image controL means connected to the display device, and said image control including third control means for selectively operating said display device to be unblanked at all times to be blanked at all times, or to be automatically blanked at all times except during a sweep.

Claim 29

The apparatus of claim 22 wherein the image control means further includes fourth control means for extending the time of operation of the display device at the end of each sweep whenever the image control means is operated by the third control means to blank the display automatically at the end of each sweep whereby visual persistance of the display elements may be extended to permit viewing by an operator after a high speed sweep.

Claim 30

The apparatus of claim 17 wherein a pair of run indicators are connected to the oscillator with each run indicator being energized alternately with signals from the oscillator, said run indicators being lighted with equally intensity when the oscillator signals are symmetrical or equal in duration and being lighted with different intensities when the oscillator signals are unsymmetrical or different in duration.

Claim 31

The apparatus of claim 17 further including third control means connected to the gating means and the ring circuit which permits signals from a selected amplitude discriminator to be stored in the stages of the upper buffer during one sweep and thereafter inhibits operation of the stages of the upper buffer whereby signal stored in the upper buffer serve as a reference pattern which is thereafter compared with signals stored in the lower buffer during each subsequent sweep.

Claim 32

The apparatus of claim 17 further including a signal delay circuit disposed between the first selection means and the gating means whereby signals from the first selection means are delayed before successive sampling operations commence.

Claim 33

The apparatus of claim 17 wherein the signal delay circuit includes a plurality of delay elements connect in series, and each delay element a transistor having a base, emitter, and collector, the base being connected to the collector of the transistor in the preceding delay element, the emitter being grounded, and the collector being connected to the base of the succeeding transistor.

Claim 34

The apparatus of claim 17 wherein the first means include slope selection means for selecting a plus slope or a minus slope of the signals from the second selection means to trigger the oscillator.

Claim 35

A test instrument for analyzing signals, said test instrument including: a plurality of amplitude discriminators each having an input and an output, a device under test connected to supply signals to the input of said amplitude discriminators, each amplitude discriminator having an adjustable clipping level, first selection means connected to the output of said amplitude discriminators for selecting at least one of said amplitude discriminators, signal delay means connected to said first selection means, an upper buffer having a plurality of stages and a lower buffer plurality having a plurality of stages, gating means connected between said signal delay circuit and each stage of the upper buffer and each stage of the lower buffers, an oscillator, a ring circuit having a plurality of stages, said oscillator being connected to said ring circuit, successive stages of said ring circuit being connected to the gating means of associated successive stages of the upper and lower buffers, second selection means connected to said plurality of amplitude discriminators for selecting any one of said amplitude discriminators for a triggering operation, first control means connected between said second selection means and said oscillator, said first control means responding to input signal equal to or greater than the clipping level of the selected amplitude discriminator to trigger said oscillator into operation, said oscillator providing signals to operate said ring circuit through one cycle of operation thereby to provide one sweep durinG which successive stages of said ring circuit operating said gating means thereby to sample the incoming signal at successive points and store the results in successive stages of the upper and lower buffers whereby data signals in different successive sample periods or time windows are stored in different stages of the upper and lower buffers, second control means connected between the ring circuit and the first control means for turning off the oscillator at the end of each sweep, a display device including an upper row of display elements and a lower row of display elements, means connecting the stages of the upper buffer to corresponding display elements in the upper row of display elements, and means connecting the stages of the lower buffer to corresponding display elements in the lower row of display elements, whereby the content of the upper buffer is visually displayed by the upper row of display elements and the content of the lower buffer is visually displayed by the lower row of display elements, comparator means connected between the stages of the upper buffer and the stages of the lower buffer, third control means, said comparator means being connected to the third control means, said third control means being operated by said comparator to indicate the result of the comparison, and fourth control means, third selection means connected to said fourth control means, means connecting said third control means to said third selection means, means connecting given ones of said amplitude discriminators to said third selection means, said third selection means being selectively operated to permit said forth control means to be operated by said third control means or any selected one of said given amplitude discriminators, said fourth control means being connected to said device under test and said fourth control means being connected to said first control means to inhibit operation of the first control means when operated by said signals from the third selection means, whereby said fourth control means is operated to signal the device under test and inhibit further triggering of the oscillator thereby to terminate operation of the test instrument at the end of such sweep and preserve signals stored in the upper and lower buffers.

Claim 36

A test instrument for analyzing signals, said test instrument including: a plurality of amplitude discriminators each having an input and an output, a device under test connected to supply signals to the input of said amplitude discriminators, each amplitude discriminator having an adjustable clipping level, first selection means connected to the output of said amplitude discriminators for selecting at least one of said amplitude discriminators, signal delay means connected to said first selection means, an upper buffer having a plurality of stages and a lower buffer plurality having a plurality of stages, gating means connected between said signal delay circuit and each stage of the upper buffer and each stage of the lower buffers, an oscillator, a ring circuit having a plurality of stages, said oscillator being connected to said ring circuit, successive stages of said ring circuit being connected to the gating means of associated successive stages of the upper and lower buffers, second selection means connected to said plurality of amplitude discriminators for selecting any one of said amplitude discriminators for a triggering operation, first control means connected between said second selection means and said oscillator, said first control means responding to input signal equal to or greater than the clipping level of the selected amplitude discriminator to trigger said oscillator into operation, said oscillator providing signals to operate said ring circuit through one cycle of operation thereby to provide one sweep durinG which successive stages of said ring circuit operating said gating means thereby to sample the incoming signal at successive points and store the results in successive stages of the upper and lower buffers whereby data signals in different successive sample periods or time windows are stored in different stages of the upper and lower buffers, second control means connected between the ring circuit and the first control means for turning off the oscillator at the end of each sweep, a display device including an upper row of display elements and a lower row of display elements, means connecting the stages of the upper buffer to corresponding display elements in the upper row of display elements, and means connecting the stages of the lower buffer to corresponding display elements in the lower row of display elements, whereby the content of the upper buffer is visually displayed by the upper row of display elements and the content of the lower buffer is visually displayed by the lower row of display elements, comparator means connected between the stages of the upper buffer and the stages of the lower buffer, third control means, said comparator means being connected to the third control means, said third control means being operated by said comparator to indicate the result of the comparison, and fourth control means, third selection means connected to said fourth control means, means connecting said third control means to said third selection means, means connecting given ones of said amplitude discriminators to said third selection means, said third selection means being selectively operated to permit said forth control means to be operated by said third control means or any selected one of said given amplitude discriminators, said fourth control means being connected to said device under test and said fourth control means being connected to said first control means to inhibit operation of the first control means when operated by said signals from the third selection means, whereby said fourth control means is operated to signal the device under test and inhibit further triggering of the oscillator thereby to terminate operation of the test instrument at the end of such sweep and preserve signals stored in the upper and lower buffers.

Claim 37

The apparatus of claim 29 wherein the first control means includes a start latch which is set by signals from the second selection means to trigger the oscillator on and is reset by signals from the second control means to turn off the oscillator at the end of each sweep.

Claim 38

The apparatus of claim 29 wherein each amplitude discriminator has an output switch which may be operated to supply normal or inverted output signals to the first selection means.

Claim 39

The apparatus of claim 29 wherein the third control means includes switch means which permits the third control means to be set by the comparator means for a match or mismatch condition between the signals atored in the upper and lower buffers.

Claim 40

The apparatus of claim 29 wherein the first selection means is operated to select two amplitude discriminators and signals from one amplitude discriminator are stored in the upper buffer and displayed in the upper row of display elements, and signals from the other amplitude discriminator are stored in the lower buffer and displayed in the lower row of display elements.

Claim 41

The apparatus of claim 29 further including image control means connected to the display device, and said image control including fifth control means for selectively operating said display device to be unblanked at all times, to be blanked at all times, or to be automatically blanked at all times except during a sweep.

Claim 42

The apparatus of claim 34 wherein the image control means further includes sixth control means for extending the time of operation of the display device at the end of each sweep whenever the image control means is operated by the fifth control means to blank the display automatically as the end of each sweep whereby visual Persistence of the display elements may be extended to permit viewing by an operator after a high speed sweep.

Claim 43

The apparatus of claim 29 wherein a pair of run indicator are connected to the oscillator with each run indicator being energized alternately with signals from the oscillator, said run indicator being lighted with equally intensity when the oscillator signals are symmetrical or equal in duration and being light with different intensities when the oscillator signal are unsymmetrical or different in duration.

Claim 44

The apparatus of claim 29 further including fifth control means connected to the gating means and the ring circuit which permits signals from a selected amplitude discriminator to be stored in the stages of the upper buffer during one sweep and thereafter inhibits operation of the stages of the upper buffer whereby signal stored in the upper buffer are preserved as a reference pattern which is thereafter compared with incoming signals stored in the lower buffer during each subsequent sweep.

Claim 45

A test instrument for analyzing signals, said test instrument including: a plurality of amplitude discriminators each having an input and an output, a device under test connected to supply signals to the input of said amplitude discriminators, each amplitude discriminator having an adjustable clipping level, each amplitude discriminator responding to input signals equal to or greater than the clipping level to provide an output signal having an up level, each amplitude discriminator responding to input signals less than the clipping level to provide an output signal having a relatively lower level, first selection means connected to the output of said amplitude discriminators for selecting at least one of said amplitude discriminators, signal delay means connected to said first selection means, an upper buffer having a plurality of stages and a lower buffer plurality having a plurality of stages, gating means connected between said signal delay circuit and each stage of the upper buffer and each stage of the lower buffers, an oscillator, a ring circuit having a plurality of stages, said oscillator being connected to said ring circuit, successive stages of said ring circuit being connected to the gating means of associated successive stages of the upper and lower buffers, second selection means connected to said plurality of amplitude discriminators for selecting any one of said amplitude discriminators for a triggering operation, first control means connected between said second selection means and said oscillator, said first control means responding to input signal equal to or greater than the clipping level of the selected amplitude discriminator to trigger said oscillator into operation, said first control means including variable delay means which may be selectively operated manually to delay a triggering operation, said oscillator providing signals to operate said ring circuit through one cycle of operation thereby to provide one sweep during which successive stages of said ring circuit operate said gating means thereby to sample the incoming signal at successive points and store the results in successive stages of the upper and lower buffers whereby data signals in different successive sample periods or time windows are stored in different stages of the upper and lower buffers, second control means connected between the ring circuit and the first control means for turning off the oscillator automatically at the end of each sweep, a display device including an upper row of display elements and a lower row of display elements, means connecting the stages of the upper buffer to corresponding display elements in the upper row of display elements, and means connecting the stages of the lower buffer to corresponding display elements in the lower row of display elements, whereby the content of the upper buffer is visually displayed by the upper row of display elements and the content of the lower buffer is visually displayed by the Lower row of display elements, comparator means connected between the stages of the upper buffer and the stages of the lower buffer, for indicating a match condition of the content of the upper and lower buffers, third control means, said comparator means being connected to the third control means, said third control means being operated by said comparator to indicate the result of the comparison performed by the comparator, fourth control means, third selection means connected to said fourth control means, means connecting said third control means to said third selection means, means connecting given ones of said amplitude discriminators to said third selection means, said third selection means being selectively operated to permit said fourth control means to be operated by said third control means or any selected one of said given amplitude discriminators, said fourth control means being connected to said first control means to inhibit operation of the first control means when operated by said signals from the third selection means, whereby said fourth control means is operated to signal the device under test and inhibit further triggering of the oscillator thereby to terminate operation of the test instrument at the end of such sweep and preserve signals stored in the upper and lower buffers.

Claim 46

A test instrument for analyzing signals, said test instrument including: a plurality of amplitude discriminators each having an input and an output, a device under test connected to supply signals to the input of said amplitude discriminators, each amplitude discriminator having an adjustable clipping level, each amplitude discriminator responding to input signals equal to or greater than the clipping level to provide an output signal having an up level, each amplitude discriminator responding to input signals less than the clipping level to provide an output signal having a relatively lower level, first selection means connected to the output of said amplitude discriminators for selecting at least one of said amplitude discriminators, signal delay means connected to said first selection means, an upper buffer having a plurality of stages and a lower buffer plurality having a plurality of stages, gating means connected between said signal delay circuit and each stage of the upper buffer and each stage of the lower buffers, an oscillator, a ring circuit having a plurality of stages, said oscillator being connected to said ring circuit, successive stages of said ring circuit being connected to the gating means of associated successive stages of the upper and lower buffers, second selection means connected to said plurality of amplitude discriminators for selecting any one of said amplitude discriminators for a triggering operation, first control means connected between said second selection means and said oscillator, said first control means responding to input signal equal to or greater than the clipping level of the selected amplitude discriminator to trigger said oscillator into operation, said first control means including variable delay means which may be selectively operated manually to delay a triggering operation, said oscillator providing signals to operate said ring circuit through one cycle of operation thereby to provide one sweep during which successive stages of said ring circuit operate said gating means thereby to sample the incoming signal at successive points and store the results in successive stages of the upper and lower buffers whereby data signals in different successive sample periods or time windows are stored in different stages of the upper and lower buffers, second control means connected between the ring circuit and the first control means for turning off the oscillator automatically at the end of each sweep, a display device including an upper row of display elements and a lower row of display elements, means connecting the stages of the upper buffer to corresponding display elements in the upper row of display elements, and means connecting the stages of the lower buffer to corresponding display elements in the lower row of display elements, whereby the content of the upper buffer is visually displayed by the upper row of display elements and the content of the lower buffer is visually displayed by the Lower row of display elements, comparator means connected between the stages of the upper buffer and the stages of the lower buffer, for indicating a match condition of the content of the upper and lower buffers, third control means, said comparator means being connected to the third control means, said third control means being operated by said comparator to indicate the result of the comparison performed by the comparator, fourth control means, third selection means connected to said fourth control means, means connecting said third control means to said third selection means, means connecting given ones of said amplitude discriminators to said third selection means, said third selection means being selectively operated to permit said fourth control means to be operated by said third control means or any selected one of said given amplitude discriminators, said fourth control means being connected to said first control means to inhibit operation of the first control means when operated by said signals from the third selection means, whereby said fourth control means is operated to signal the device under test and inhibit further triggering of the oscillator thereby to terminate operation of the test instrument at the end of such sweep and preserve signals stored in the upper and lower buffers.

Claim 47

The apparatus of claim 38 wherein the first control means includes a start latch which is set by signals from the second selection means to trigger the oscillator on and is reset by signals from the second control means to turn off the oscillator at the end of each sweep.

Claim 48

The apparatus of claim 39 wherein each amplitude discriminator has an output switch which may be operated to supply normal or inverted output signals to the first selection means.

Claim 49

The apparatus of claim 40 wherein the third control means includes switch means which permits the third control means to be set by the comparator means for a match or mismatch condition between the signals stored in the upper and lower buffers.

Claim 50

The apparatus of claim 41 wherein the first selection means is operated to select two amplitude discriminators and signals from one amplitude discriminator are stored in the upper buffer and displayed in the upper row of display elements, and signals from the other amplitude discriminator are stored in the lower buffer and displayed in the lower row of display elements.

Claim 51

The apparatus of claim 42 further including image control means connected to the display device, and said image control including fifth control means for selectively operating said display device to be unblanked at all times, to be blanked at all times, or to be automatically blanked at all times except during a sweep.

Claim 52

The apparatus of claim 43 wherein the image control means further includes sixth control means for extending the time of operation of the display device at the end of each sweep whenever the image control means is operated by the fifth control means to blank the display automatically at the end of each sweep whereby visual persistence of the display elements may be extended to permit viewing by an operator after a high speed sweep.

Claim 53

The apparatus of claim 44 wherein a pair of run indicators are connected to the oscillator with each run indicator being energized alternately with signals from the oscillator, said run indicators being lighted with equally intensity when the oscillator signals are symmetrical or equal in duration and being lights with different intensities when the oscillator signal are unsymmetrical or different in duration.

Claim 54

The apparatus of claim 45 further including seventh control means connected to the gating means and the ring circuit which permits signals from a selected amplitude discriminator to be stored in the stages of the upper buffer during one sweep and thereafter inhibits operation of the stages of the upper buffer whereby signal stored in the upper buffer are preserved as a reference pattern which is thereafter compared with inComing signals stored in the lower buffer during each subsequent sweep.

Claim 55

The apparatus of claim 38 wherein the first selection means is operated to select two amplitude discriminators, and signals from one amplitude discriminator are stored in the upper buffer and displayed in the upper row of display elements, and signals from the other amplitude discriminator are stored in the lower buffer and displayed in the lower row of display elements, display elements in the upper row of display elements being illuminated whenever the input signal to the one amplitude discriminator equals or exceeds the clipping level of the one amplitude discriminator, and display elements in the lower row of display elements being illuminated when the input signals to the other amplitude discriminator equal or exceed the clipping level of such other amplitude discriminator.

Claim 56

The apparatus of claim 38 wherein said first control means further includes an internal source of trigger pulses which may be employed to trigger the oscillator whenever triggering signals are not available from the second selection means.

Claim 57

The apparatus of claim 38 further including a first external source of digital data signals connected to supply such signals in parallel to the stages of the upper buffer, a second external source of digital data signals connected to supply such signals in parallel to the stages of the lower buffer, whereby the upper and lower buffers selectively may be loaded with digital data signals representing reference patterns.

Claim 58

The apparatus of claim 38 wherein said first control means includes fifth control means selectively connected to one of said amplitude discriminators for receiving external oscillator pulses, said fifth control means being connected to operate said ring circuit whereby said test instrument may be operated by oscillator signals from a remote location.

Claim 59

The apparatus of claim 38 wherein reset means is provided to reset all controls and all stages of the ring circuit, the upper buffer, and the lower buffer, said reset means including a first input and a second input, manually operable means connected to the first input for reseting the test instrument, responding to signals and said second input on a line from a remote location to reset the test instrument.