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US3789372A Expired / Lapsed US ⏱️ 0.0 years remaining

Self tracking beam accessible memory and addressing method therefor

Assignee: Individual
•
Filing: 1973-01-29
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Granted: 1974-01-29
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Expires: 1993-01-29
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Abstract

Abstract A light beam or an electron beam is deflected by analog methods to one of a plurality of acceptance zones, each serving a multiplicity of words arrayed in one dimension of the memory and accessed by a word selection line or stripe directed in the other dimension of the array. Each word selection line is an extension of a median line of the acceptance zone to which it relates. Pairwise distinctive guiding means are provided in each acceptance zone on either side of the median and as borders on either side of each word selection stripe, of such a kind as to generate a pair of distinctive signals when swept by the access beam. From these signals an error signal is derived and applied to the deflection circuits to provide tracking of the beam. Counting spots on the word selection stripe enable digital circuits to stop the sweep at the precise word address, after which the word is swept to read or write information. Beam tracking may also be provided for word stripes in the same manner as for word selection stripes.

Inventors

  • 👤 J Lejon

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 17:22
CPC Classifications
G; G11; G11C; G11C13/00; G11C13/04

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 212 words
A method of addressing the access beam of a beam-accessed two-dimensional information storage memory array adapted to store binary coded information in the form of addressable words of which the bits are aligned in one of said dimensions, hereinafter referred to as the first dimension, comprising the steps of: deflecting said beam, by means of analog forces representative of the desired address, to an approximate address in the neighborhood of the exact address to which access is desired; further deflecting said beam from said approximate address to an entrance extremity of a word selection stripe running in the second of said dimensions and along said word selection stripe over a number of digital segments defined by digital address information, under constraining influence of guide means interposed in said memory array in two mutually distinct patches in the area of said approximate address and in mutually distinct borders on each side of said word selection stripe and adapted to be swept by at least an edge of said beam during such deflection along said word selection stripe, and further deflecting said beam in said first dimensioN over a number of digital segments corresponding to the length of the addressed word stripe and thereby reading or writing a word from or into said memory.
Claim 2
Independent Claim 212 words
A method of addressing the access beam of a beam-accessed two-dimensional information storage memory array adapted to store binary coded information in the form of addressable words of which the bits are aligned in one of said dimensions, hereinafter referred to as the first dimension, comprising the steps of: deflecting said beam, by means of analog forces representative of the desired address, to an approximate address in the neighborhood of the exact address to which access is desired; further deflecting said beam from said approximate address to an entrance extremity of a word selection stripe running in the second of said dimensions and along said word selection stripe over a number of digital segments defined by digital address information, under constraining influence of guide means interposed in said memory array in two mutually distinct patches in the area of said approximate address and in mutually distinct borders on each side of said word selection stripe and adapted to be swept by at least an edge of said beam during such deflection along said word selection stripe, and further deflecting said beam in said first dimensioN over a number of digital segments corresponding to the length of the addressed word stripe and thereby reading or writing a word from or into said memory.
Claim 3
Dependent Claim 66 words
An addressing method as defined in claim 1 in which said step of deflecting said beam in said first dimension to read or write said word is performed under constraining influence of guides interposed in said memory array on each side of said addressed word stripe and adapted to be swept by at least an edge of said beam during said reading or writing deflection step.
Claim 4
Dependent Claim 88 words
An addressing method as defined in claim 1 in which deflection under constraining influence of said guides is performed by the steps of: electrically detecting electronic or radiant indications including two distinct components from mutually distinct portions of said guide means during sweeping of said approximate address area and said word selection stripe by said beam; preparing an error signal by comparing the respective amplitudes of said distinct components of said indications, and modifying the deflection orthogonal to the direction of sweep under control of said error signal.
Claim 5
Dependent Claim 284 words
A memory for beam-accessed two-dimensional storage of binary coded information, said dimensions being referred to as directed in the X and Y directions, having an array of one bit memory elements, arranged in word stripes aligned in the Y direction on a memory plane support and beam projection and deflecton means for selectively accessing each of said memory elements, and comprising, interposed in said array: a plurality of acceptance zones each composed of two regions having a common boundary aligned in the X direction and respectively having means for generating pairwise mutually distinctive signals when swept in the X direction by the beam of said beam projecting means; a plurality of word selection stripes respectively associated with said acceptance zones and centered on lines extending the said inter-region boundaries of said zones, said word selection stripes having a plurality of counting spots respectively corresponding to word positions, and guide borders on each side of said word selection stripes comprising means in the case of each stripe, for generating pairwise mutually distinct signals when said beam is deflected to sweep the corresponding stripe; said beam deflecting means of said memory further comprising means for deflecting said beam to a selected acceptance zone and sweeping it therefrom in the X direction along a word selection stripe associated with said zone, under digital control responsive to sweeping said counting spots, to the selected word position and thence in the Y direction over a selected word, and means for incremental deflection in the Y direction as needed for tracking during said sweeping in the X direction under control of an error signal obtained by comparing said mutually distinct signals generated by the aforesaid means for generating the same.
Claim 6
Dependent Claim 284 words
A memory for beam-accessed two-dimensional storage of binary coded information, said dimensions being referred to as directed in the X and Y directions, having an array of one bit memory elements, arranged in word stripes aligned in the Y direction on a memory plane support and beam projection and deflecton means for selectively accessing each of said memory elements, and comprising, interposed in said array: a plurality of acceptance zones each composed of two regions having a common boundary aligned in the X direction and respectively having means for generating pairwise mutually distinctive signals when swept in the X direction by the beam of said beam projecting means; a plurality of word selection stripes respectively associated with said acceptance zones and centered on lines extending the said inter-region boundaries of said zones, said word selection stripes having a plurality of counting spots respectively corresponding to word positions, and guide borders on each side of said word selection stripes comprising means in the case of each stripe, for generating pairwise mutually distinct signals when said beam is deflected to sweep the corresponding stripe; said beam deflecting means of said memory further comprising means for deflecting said beam to a selected acceptance zone and sweeping it therefrom in the X direction along a word selection stripe associated with said zone, under digital control responsive to sweeping said counting spots, to the selected word position and thence in the Y direction over a selected word, and means for incremental deflection in the Y direction as needed for tracking during said sweeping in the X direction under control of an error signal obtained by comparing said mutually distinct signals generated by the aforesaid means for generating the same.
Claim 7
Dependent Claim 55 words
A memory as defined in claim 4 in which said means for generating mutually distinct signals, both of said zones and of said stripes, are secondary electron emissive areas and stripes or lines interrupted in the X direction by gaps having pairwise mutually distinct spatial periodicity and in which said beam is an electron beam.
Claim 8
Dependent Claim 61 words
A memory as defined in claim 4 in which said means for generating mutually distinct signals, both of said zones and of said stripes, are phosphor coated areas and stripes interrupted in the X direction by gaps having pairwise mutually distinct spatial periodicity and in which said beam is an electron beam adapted to excite said phosphor coated areas to luminescence.
Claim 9
Dependent Claim 46 words
A memory as defined in claim 4 in which said means for generating mutually distinct signals, both of said zones and of said stripes, are areas and stripes of materials adapted to emit or transmit light of pairwise distinct colors when said beam is swept thereover.
Claim 10
Dependent Claim 44 words
A memory as defined in claim 4 in which said memory arRay and said zones and stripes interposed therein are provided on a luminescent cathode ray tube screen and in which said addressing beam is the reading and writing access beam for said memory.
Claim 11
Dependent Claim 69 words
A memory as defined in claim 4 in which said memory array and zones and stripes interposed therein are inscribed on a transparent plate placed against the external surface of the screen of a cathode ray tube of which said beam is the scanning beam and effects reading, writing of said memory and also activates beam guidance by causing light transmission through the glass of said cathode ray tube.
Claim 12
Dependent Claim 121 words
A memory as defined in claim 9 in which the portions of the inscribed transparent plate relating to said zones and stripes, including both word selection stripes and word stripes, and to said counting spots are constituted of zones of selectively colored light transmission transmitting to the outside only radiation of wave lenghts lambda 1, lambda 2 and lambda 3 of the light spectrum produced by the screen luminescence, and in which, further, means for selectively and simultaneously detecting radiation of wave lengths lambda 1, lambda 2 and lambda 3 are provided on the outside of said inscribed transparent place for receiving information for generating said error signal, for counting said counting spots and for reading words of said memory array.
Claim 13
Dependent Claim 76 words
A memory as defined in claim 4 in which said memory array and zones and stripes interposed therein are formed of a plate of light sensible material located in the ambient air and in which said beam adapted to sweep said plate is a light beam and said beam deflecting means are apparatus adapted to induce changes in the index of refraction of at least a portion of the medium through which said light beam travels.
Claim 14
Dependent Claim 125 words
A memory as defined in claim 4 in which said memory array and zones and stripes interposed therein are formed by an assembly of a multiplicity of elementary semiconductor chips each comprising integrated active element circuits and in which each of said elementary chips has its own acceptance zone and its own word selection stripe inscribed on the chip during the manufacture of its said integrated circuits, and in which, further, means responsive to variations of beam current are provided to produce reading and writing of information from and into said memory array as said beam is swept in said Y direction as aforesaid and to effect counting of counting spots and stripe tracking as said beam is swept in said X direction as aforesaid.
Claim 15
Dependent Claim 38 words
A memory as defined in claim 12 in which interconnection of adjacent chips of said chip assembly are limited to a common circuit bus, not more than two power supply buses and not more than two read-write buses.
Claim 16
Dependent Claim 109 words
A memory as defined in claim 12 in which said chip assembly is placed in the evacuated enclosure of a cathode ray tube and in which said guide borders, zone regions, counting spots and integrated circuit active elements are in conducting paths through which at least a portion of the current of said beam is arranged to pass, and in which the portion of said beam current that passes through said guide borders and said zone regions is used to produce said error signal and the portion of said beam current that passes through said active elements is directly utilized for reading from or writing into said active elements.
Claim 17
Dependent Claim 45 words
A memory as defined in claim 12 in which said beam is a light beam and in which said guide borders, zone regions, counting spots and integrated circuit active elements consist of photoconductive or photoemissive elements or partly of photoconductive and partly of photoemissive elements.
Claim 18
Dependent Claim 75 words
A memory as defined in claim 12 in which said chips are rectangular the said acceptance zone of each chip is located on an axis of symmetry oriented in the X direction of said chip, in which the said word selection stripe of each chip is centered on said axis of symmetry and the said word stripes are provided extending in the Y Direction from both sides of said word selection stripe on each chip.
Claim 19
Dependent Claim 419 words
A memory for beam-accessed two-dimensional storage of binary coded information, said dimensions being referred to as directed in the X and Y directions, comprising: a mosaic of semiconductor active element integrated circuit chips adapted to be scanned by two electron beams independently in a single cathode ray tube respectively by two beam forming means and two beam deflecting means; each chip of said mosaic having a two-dimensional array of one bit active storage elements switchably by a beam current above a predetermined minimum with a readout active element for each of said storage elements adapted to provide readout with a beam current below said predetermined minimum, each of said storage elements having also a first and second beam current connection for reading from and writing into said elements only when the current of one of said beams is applied to one of said beam current connections and the current of the other of said beams is applied to the other of said connections; means for applying beam current to each chip including an acceptance zone for each of said beams and a selection stripe extending from said zones, in one case in the X direction in the other case in the Y direction, across said chip, and an array of conductors from each of said stripes across said chip in the Y direction from the X-directed stripe and vice versa, said conductors from one of said stripes connecting together, row by row, one of said beam current connections of each of said storage elements and said conductors from the other of said stripes similarly connecting the other of said beam current connections of each of said storage elements; means for deflecting said beams to the respective acceptance zones of an addressed chip by analong deflecting forces, for thereafter deflecting one of said beams along said X directed stripe for an address-determined number of segments and the other of said beams similarly along said Y directed stripe and means for thereafter setting the beam current at a read or a write magnitude and for detecting the effect of the state of said storage element on a reading current; guiding means in said zones and bordering said stripes adapted to generate two distinct kinds of signals when swept by one of said beams, and deflection tracking means responsive to signals generated by said beams and said guide means adapted to produce an error signal therefrom and to apply it to said deflecting means to track said beams respectively on said stripes.
Claim 20
Dependent Claim 419 words
A memory for beam-accessed two-dimensional storage of binary coded information, said dimensions being referred to as directed in the X and Y directions, comprising: a mosaic of semiconductor active element integrated circuit chips adapted to be scanned by two electron beams independently in a single cathode ray tube respectively by two beam forming means and two beam deflecting means; each chip of said mosaic having a two-dimensional array of one bit active storage elements switchably by a beam current above a predetermined minimum with a readout active element for each of said storage elements adapted to provide readout with a beam current below said predetermined minimum, each of said storage elements having also a first and second beam current connection for reading from and writing into said elements only when the current of one of said beams is applied to one of said beam current connections and the current of the other of said beams is applied to the other of said connections; means for applying beam current to each chip including an acceptance zone for each of said beams and a selection stripe extending from said zones, in one case in the X direction in the other case in the Y direction, across said chip, and an array of conductors from each of said stripes across said chip in the Y direction from the X-directed stripe and vice versa, said conductors from one of said stripes connecting together, row by row, one of said beam current connections of each of said storage elements and said conductors from the other of said stripes similarly connecting the other of said beam current connections of each of said storage elements; means for deflecting said beams to the respective acceptance zones of an addressed chip by analong deflecting forces, for thereafter deflecting one of said beams along said X directed stripe for an address-determined number of segments and the other of said beams similarly along said Y directed stripe and means for thereafter setting the beam current at a read or a write magnitude and for detecting the effect of the state of said storage element on a reading current; guiding means in said zones and bordering said stripes adapted to generate two distinct kinds of signals when swept by one of said beams, and deflection tracking means responsive to signals generated by said beams and said guide means adapted to produce an error signal therefrom and to apply it to said deflecting means to track said beams respectively on said stripes.

References Cited (Backward Citations)

US3721962A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-01-28 1977-07-30 1978-01-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-01-28 1981-07-30 1982-01-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-01-28 1985-07-30 1986-01-29 $7700.00 Window Closed / Lapsed

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