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US3789359A Expired / Lapsed US ⏱️ 0.0 years remaining

Synchronism indicator for a convolutional decoder

Assignee: Harris Corp
•
Filing: 1972-10-04
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Granted: 1974-01-29
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Expires: 1992-10-04
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Abstract

Abstract Apparatus for synchronizing a decoder of convolution codes with a received stream of convolutional code data. Synchronization is achieved with respect to such problems as bit polarity inversion and incorrect boundaries of branch intervals by examining a number of trial message sequences. The trial message sequences are obtained by an algorithm suggested by Viterbi involving selection of one survivor sequence terminating in each data state of the code. When the decoder is synchronized with the received data stream, the survivor data sequences are very probably all identical at a branch interval near the older-data end of the sequences. When the decoder is not synchronized, the survivor sequences, with high probability, differ from each other at that branch interval. Loss of synchronism is detected by simultaneously examining the survivor sequences at a branch interval located at a selected number L of branch intervals before the last-received data, L being less than or equal to the decoding depth. If the survivor sequences are not unanimous at depth L a count is registered. If the number of such counts occurring within a test period of B successive branch intervals exceeds a predetermined threshold T, branch synchronism is presumed to be incorrect and a search is initiated for correct synchronism.

Inventors

  • 👤 G Clark
  • 👤 R Davis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 15:26
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004; H04L1/0056; H04L1/0059; H03; H03M; H03M13/00; H03M13/33

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 229 words
A branch synchronism indicator for indicating whether or not a decoder is in synchronism with convolutionally encoded data which it receives in successive branch intervals, said decoder being of a type which upon each branch interval produces in an intermediate step of its decoding process a plurality of trial data sequences spanning a common group of branch intervals, said trial data sequences being characterized by a high probability of unanimity of data occupying a predetermined branch interval location within the span of the trial data sequences when the decoder is synchronized and by a low probability of unanimity of the data at said location when the decoder is not synchronized, comprising data register means for storing the data of at least said predetermined branch interval location of each of said trial data sequences, a logic circuit receiving input signals indicative of the data in said predetermined branch interval location for ascertaining whether or not said data are unanimous and for producing an output signal indicating either unanimity or nonunanimity, circuit means connected to receive said signals indicative of unanimity or nonunanimity for producing a signal if the rate of occurrence of the signals indicating nonunanimity exceeds a predetermined threshold, and timing means connected to said data register means, to said logic circuit, and to said circuit means for providing sequencing control signals cyclically repeating upon each successive branch interval.
Claim 2
Dependent Claim 229 words
A branch synchronism indicator for indicating whether or not a decoder is in synchronism with convolutionally encoded data which it receives in successive branch intervals, said decoder being of a type which upon each branch interval produces in an intermediate step of its decoding process a plurality of trial data sequences spanning a common group of branch intervals, said trial data sequences being characterized by a high probability of unanimity of data occupying a predetermined branch interval location within the span of the trial data sequences when the decoder is synchronized and by a low probability of unanimity of the data at said location when the decoder is not synchronized, comprising data register means for storing the data of at least said predetermined branch interval location of each of said trial data sequences, a logic circuit receiving input signals indicative of the data in said predetermined branch interval location for ascertaining whether or not said data are unanimous and for producing an output signal indicating either unanimity or nonunanimity, circuit means connected to receive said signals indicative of unanimity or nonunanimity for producing a signal if the rate of occurrence of the signals indicating nonunanimity exceeds a predetermined threshold, and timing means connected to said data register means, to said logic circuit, and to said circuit means for providing sequencing control signals cyclically repeating upon each successive branch interval.
Claim 3
Dependent Claim 81 words
A branch synchronism indicator as defined in claim 1 wherein said circuit means comprises counting means connected to receive said signals indicative of unanimity or nonunanimity for couNting the signals of nonunanimity occurring within a first predetermined number of successive branch intervals and for registering the count, and wherein said circuit means further comprises a comparator for comparing said count from said counting means with a second predetermined number for producing a signal if the count exceeds said second predetermined number.
Claim 4
Dependent Claim 149 words
A branch synchronism indicator as defined in claim 2 wherein said counting means comprises a shift register having a number of data stages equal to said first predetermined number and having a register input and a register output, said register input being connected to receive said output signal from said logic circuit for shifting said output signal through said shift register upon successive branch intervals; and wherein said counting means further comprises a counter capable of counting up and down and registering a count, having an up-count input connected to receive said output signal from said logic circuit to increment the counter when said output signal indicates nonunanimity and having a down-count input connected to receive signals from said register output to decrement said counter upon a register output signal indicating nonunanimity, said counter being resettable to start with zero count and having an output connected to said comparator.
Claim 5
Dependent Claim 120 words
A branch synchronism indicator as defined in claim 2 wherein said counting means comprises a first counter connected to receive said output signal from said logic circuit for counting the output signals indicating nonunanimity and for outputting its count data to said comparator, a second counter for counting all successive branch intervals, and reset circuit means receiving count data from said second counter and responsive upon receiving a count equal to said first predetermined number to reset said first and said second counters, said reset circuit means being responsive moreover to occurrence of said signal produced by said comparator indicating that said count from said counting means exceeds said second predetermined number, to reset said first and said second counters.
Claim 6
Independent Claim 263 words
A method of controlling an output apparatus in accordance with whether or not a decoder is in synchronism with convolutionally encoded data which it receives in successive branch intervals, said decoder being of a type which upon each branch interval produces in an intermediate step of its decoding process a plurality of trial data sequences spanning a common group of branch intervals, said trial data sequences being characterized by a high probability of unanimity of data occupying a predetermined branch interval location within the span of the trial data sequences when the decoder is synchronized and by a low probability of unanimity of the data at said location when the decoder is not synchronized, comprising the steps of: representing the data of at least said predetermined branch interval location of each of the trial data sequences as electrical signals, providing electronic data storage apparatus, storing in said data storage apparatus said electrical signals representing said data of at least said predetermined branch interval location of each of the trial data sequences, electrically comparing upon receipt of each branch interval the data at the predetermined branch interval location as to unanimity along the trial sequences to produce a signal indicating unanimity or nonunanimity, determining a rate of occurrence of the signals indicating nonunanimity in apparatus provided for that purpose, inanimately comparing the rate of occurrence of signals indicating nonunanimity with a predetermined threshold, automatically producing a signal indicating lack of synchronism when said rate of occurrence exceeds said threshold, and utilizing said signal indicating lack of synchronism to effect control of said output apparatus.
Claim 7
Independent Claim 263 words
A method of controlling an output apparatus in accordance with whether or not a decoder is in synchronism with convolutionally encoded data which it receives in successive branch intervals, said decoder being of a type which upon each branch interval produces in an intermediate step of its decoding process a plurality of trial data sequences spanning a common group of branch intervals, said trial data sequences being characterized by a high probability of unanimity of data occupying a predetermined branch interval location within the span of the trial data sequences when the decoder is synchronized and by a low probability of unanimity of the data at said location when the decoder is not synchronized, comprising the steps of: representing the data of at least said predetermined branch interval location of each of the trial data sequences as electrical signals, providing electronic data storage apparatus, storing in said data storage apparatus said electrical signals representing said data of at least said predetermined branch interval location of each of the trial data sequences, electrically comparing upon receipt of each branch interval the data at the predetermined branch interval location as to unanimity along the trial sequences to produce a signal indicating unanimity or nonunanimity, determining a rate of occurrence of the signals indicating nonunanimity in apparatus provided for that purpose, inanimately comparing the rate of occurrence of signals indicating nonunanimity with a predetermined threshold, automatically producing a signal indicating lack of synchronism when said rate of occurrence exceeds said threshold, and utilizing said signal indicating lack of synchronism to effect control of said output apparatus.
Claim 8
Dependent Claim 111 words
A method of controlling an output apparatus as defined in claim 5 wherein said step of determining a rate of occurrence comprises establishing a period consistIng of a first predetermined number of successive comparisons of the data at said predetermined branch interval location, and counting the signals indicating nonunanimity occurring in said period, and wherein the step of comparing the rate of occurrence with a threshold comprises comparing the number of signals indicating nonunanimity occurring in said period with a second predetermined number, and wherein the step of producing a signal indicating lack of synchronism comprises producing a signal when said number of signals indicating nonunanimity exceeds said second predetermined number.
Claim 9
Dependent Claim 67 words
A method of controlling an output apparatus as defined in claim 6 wherein said step of establishing a period comprises establishing a running period in which upon receipt of each branch interval a new signal indicating unanimity or nonunanimity is included in said period and the oldest of such signals which was included in said period at an immediately preceding branch interval is omitted from said period.
Claim 10
Dependent Claim 54 words
A method of controlling an output apparatus as defined in claim 6 wherein said step of establishing a period comprises terminating a preceding block period and starting a new block period when the preceding block period achieves said first predetermined number or when said signal indicating lack of synchronism is produced, whichever occurs first.
Claim 11
Dependent Claim 40 words
A method as defined in claim 5 and wherein said step of utilizing said signal indicating lack of synchronism comprises the step of effecting the starting and stopping of automatic searching and synchronizing apparatus which searches for and establishes synchronism.

References Cited (Backward Citations)

US3546592A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-01-28 1977-07-30 1978-01-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-01-28 1981-07-30 1982-01-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-01-28 1985-07-30 1986-01-29 $7700.00 Window Closed / Lapsed

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