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US3789316A Expired / Lapsed US ⏱️ 0.0 years remaining

Sine-cosine frequency tracker

Assignee: Singer Co
•
Filing: 1973-06-13
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Granted: 1974-01-29
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Expires: 1993-06-13
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Abstract

Abstract A sine-cosine frequency tracking system is provided for tracking the center of power of a Doppler type input signal. The system of the invention includes a discriminator connected in an error feedback loop, and which develops an error signal whenever the center frequency of the input signal differs from the frequency of a pair of sine-cosine keying signals. The aforesaid discriminator incorporates solid state integrated circuitry, and it is constructed to eliminate the need for difficult trim adjustments which are necessary in the prior art systems. The aforesaid discriminator also serves to improve the accuracy of the system by removing error sources present in the prior art systems.

Inventors

  • 👤 P Goetz
  • 👤 L Solomon

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 10:36
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/087

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 278 words
In a frequency tracking system which comprises: a cosine signal channel including a first modulator; a sine signal channel including a second modulator; input circuit means connected to said sine signal channel and to said cosine signal channel for introducing an input signal to the first and second modulators; frequency-adjustable oscillator means for producing a pair of phase quadrature sine and cosine keying signals, said oscillator being connected to the sine and cosine channels for introducing said keying signals to said first and second modulators respectively; a discriminator coupled to said modulators and responsive to the outputs thereof to produce an error signal; integrator means connected to said discriminator and responsive to said error signal to produce a corresponding integral signal and for applying said integral signal to said oscillator to control the frequency thereof; said discriminator including: a low-pass cosine filter coupled to said first modulator in said cosine signal channel; a high-Pass sine filter coupled to said second modulator in said sine signal channel; a keying circuit interposed between the output of one of the filters and the input of said integrator means; and circuit means connected to the output of the other of the filters for producing a digital signal having a first value when said output is on one side of a reference axis and having a second value when said output is on the other side of the reference axis, said circuit means applying said digital signal to said keying circuit to cause said keying circuit alternately to connect and disconnect the output of said one of said filters to the input of said integrator means for phase detection of said last-named output.
Claim 2
Dependent Claim 278 words
In a frequency tracking system which comprises: a cosine signal channel including a first modulator; a sine signal channel including a second modulator; input circuit means connected to said sine signal channel and to said cosine signal channel for introducing an input signal to the first and second modulators; frequency-adjustable oscillator means for producing a pair of phase quadrature sine and cosine keying signals, said oscillator being connected to the sine and cosine channels for introducing said keying signals to said first and second modulators respectively; a discriminator coupled to said modulators and responsive to the outputs thereof to produce an error signal; integrator means connected to said discriminator and responsive to said error signal to produce a corresponding integral signal and for applying said integral signal to said oscillator to control the frequency thereof; said discriminator including: a low-pass cosine filter coupled to said first modulator in said cosine signal channel; a high-Pass sine filter coupled to said second modulator in said sine signal channel; a keying circuit interposed between the output of one of the filters and the input of said integrator means; and circuit means connected to the output of the other of the filters for producing a digital signal having a first value when said output is on one side of a reference axis and having a second value when said output is on the other side of the reference axis, said circuit means applying said digital signal to said keying circuit to cause said keying circuit alternately to connect and disconnect the output of said one of said filters to the input of said integrator means for phase detection of said last-named output.
Claim 3
Dependent Claim 42 words
The combination defined in claim 1, in which said keying circuit is connected between the output of said sine filter and the input of said integrator means; and in which said circuit means is connected to the output of said cosine filter.
Claim 4
Dependent Claim 62 words
The combination defined in claim 2, in which said keying circuit includes a field effect transistor having source, gate and drain electrodes, the output of said sine filter being applied to said source electrode, the output of said circuit means being applied to said gate electrode, and the output from said drain electrode being introduced to the input of said integrator means.
Claim 5
Dependent Claim 25 words
The combination defined in claim 3, and which includes a pair of back-to-back diodes connected between said source electrode and a point of reference potential.
Claim 6
Dependent Claim 45 words
The combination defined in claim 3, and which includes a further field effect transistor connected between said source electrode and a point of reference potential, said second field effect transistor having a gate electrode connected to the gate electrode of said first field effect transistor.
Claim 7
Dependent Claim 16 words
The combination defined in claim 2, in which said circuit means comprises a voltage comparator circuit.

References Cited (Backward Citations)

US3123769A Cited
US2731566A Cited
US3121202A Cited
US3748590A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-01-28 1977-07-30 1978-01-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-01-28 1981-07-30 1982-01-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-01-28 1985-07-30 1986-01-29 $7700.00 Window Closed / Lapsed

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