Digital phase locked loop

Claim 2

Apparatus for providing a square wave output signal at substantially a repetition rate fs having a phase closely approximately the phase of an input signal at the frequency rate fs, said apparatus comprising a. means for receiving the input signal having a frequency fs; b. a source of signals having a frequency rate at 2n X fs, wherein n is a positive integer; c. an n-stage binary counter having an input and an output, and being adapted to provide a square wave output signal therefrom at a frequency rate 1/2n that of a signal applied to the input thereof; d. a phase detector circuit coupled to receive said input signal receiving means and the output of the said binary counter for providing a signal therefrom representative of the phase of said input signal; e. integrating means coupled to the output of said phase detector circuit for integrating the representative signal therefrom, said integrating means being reset periodically by the output signal from said counter; f. an analog to digital converter coupled to said integrating means for producing a digital output therefrom corresponding to the integrated phase representative signal applied thereto; and g. control means, coupling said source of signals to said counter, for advancing and retarding the phase of said square wave output signal proportional to said digital output.

Claim 3

Apparatus for providing a square wave output signal at substantially a repetition rate fs having a phase closely approximating the phase of an input signal at the frequency rate fs, said apparatus comprising a. means for receiving the input signal having a frequency fs; b. a source of signal having a frequency rate at 2n X fs, wherein n is a positive integer; c. an n-stage binary counter having an input, and a first output adapted to provide a square wave output signal therefrom at a frequency rate 1/2n that of a signal applied to the input thereof; d. a phase detector circuit coupled to receive said input signal receiving means and the output of said binary counter for providing a signal therefrom representative of the phase of said input signal; e. level discriminator means coupled to the output of said phase detector circuit for providing an ''''advance'''' pulse along one output line therefrom, and a ''''retard'''' pulse along a second output line thereon, in a selective manner; and f. control means, coupling said source of signals to said counter, for advancing and retarding the phase of said square wave output signal proportional to said level discriminator outputs.

Claim 4

Apparatus for providing a square wave output signal at substantially a repetition rate fs having a phase closely approximating the phase of an input signal at the frequency rate fs, said apparatus comprising a. means for receiving the input signal having a frequency fs; b. a source of signal having a frequency rate at 2n X fs, wherein n is a positive integer; c. an n-stage binary counter having an input, and a first output adapted to provide a square wave output signal therefrom at a frequency rate 1/2n that of a signal applied to the input thereof; d. a phase detector circuit coupled to receive said input signal receiving means and the output of said binary counter for providing a signal therefrom representative of the phase of said input signal; e. level discriminator means coupled to the output of said phase detector circuit for providing an ''''advance'''' pulse along one output line therefrom, and a ''''retard'''' pulse along a second output line thereon, in a selective manner; and f. control means, coupling said source of signals to said counter, for advancing and retarding the phase of said square wave output signal proportional to said level discriminator outputs.

Claim 5

means for coupling said source of signals through said second counter; and B. means for providing a digital output for representing the difference between the phase of said input signal and said reference phase including 1. n two-input AND gates, one input of each of said gates being coupled to a corresponding one of the n outputs of the first binary counter, the second input of each of said gates being coupled to the output of said second counter, and n outputs therefrom for indicating the digital output phase difference.

Claim 6

means for coupling said source of signals through said second counter; and B. means for providing a digital output for representing the difference between the phase of said input signal and said reference phase including 1. n two-input AND gates, one input of each of said gates being coupled to a corresponding one of the n outputs of the first binary counter, the second input of each of said gates being coupled to the output of said second counter, and n outputs therefrom for indicating the digital output phase difference.

Claim 7

The apparatus as recited in claim 2 wherein said n-stage binary counter further includes n outputs therefrom for carrying data indicative of the instantaneous state of said counter; said apparatus further comprising A. means for providing a reference phase including

Claim 8

Apparatus for providing a square wave output signal at substantially a repetition rate fs having a phase closely approximating the phase of an input signal at the frequency rate fs, said apparatus comprising a. means for receiving the input signal having a frequency fs; b. a source of signal having a frequency rate at 2n X fs; wherein n is a positive integer; c. an n-stage binary counter having an input, a first output adapted to provide a square wave output signal therefrom at a frequency rate 1/2n that of a signal applied to the input thereof; and n outputs therefrom for carrying data indicative of the instantaneous state of said counter; d. means for converting the input signal into a train of pulses having a repetition rate fs; e. n two-input AND gates, one input of each of said gates being coupled to a corresponding one of the n outputs from said counter, the second input of said gates being coupled to receive said train of pulses; and f. control means, coupling said source of signals to said counter, for advancing and retarding the phase of said square wave signal in accordance with the states of said AND gates, whereby the carry of said counter-which occurs when the counter reaches 2n and resets to 0-is made to coincide with a pulse of said train, so that the output waveform of said counter tracks the input signal phase.

Claim 9

Apparatus for providing a square wave output signal at substantially a repetition rate fs having a phase closely approximating the phase of an input signal at the frequency rate fs, said apparatus comprising a. means for receiving the input signal having a frequency fs; b. a source of signal having a frequency rate at 2n X fs; wherein n is a positive integer; c. an n-stage binary counter having an input, a first output adapted to provide a square wave output signal therefrom at a frequency rate 1/2n that of a signal applied to the input thereof; and n outputs therefrom for carrying data indicative of the instantaneous state of said counter; d. means for converting the input signal into a train of pulses having a repetition rate fs; e. n two-input AND gates, one input of each of said gates being coupled to a corresponding one of the n outputs from said counter, the second input of said gates being coupled to receive said train of pulses; and f. control means, coupling said source of signals to said counter, for advancing and retarding the phase of said square wave signal in accordance with the states of said AND gates, whereby the carry of said counter-which occurs when the counter reaches 2n and resets to 0-is made to coincide with a pulse of said train, so that the output waveform of said counter tracks the input signal phase.