US3787738A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulse producing circuit
Assignee: United States Department of the Army
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Filing: 1972-09-28
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Granted: 1974-01-22
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Expires: 1992-09-28
Abstract
Abstract A circuit for producing pulses having a very high, steeply rising front portion of short duration, followed by a considerably longer portion of lower current is disclosed. The circuit utilizes a single transistor which is operated in the avalanche breakdown mode to provide the high, steeply rising, front portion of the output pulse and is then operated in the normal amplifier mode to provide the longer lower current rear portion of the output pulse. While the circuit has general utility as a pulse producing circuit, it is particularly useful as a thyristor firing circuit.
Inventors
- 👤 T Horwath
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 03:57
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
247 words
A pulse generating circuit comprising: a transistor having a base electrode, an emitter electrode, and a collector electrode; a first voltage source coupled between said collector and said emitter, wherein said first voltage source has its negative side directly connected to said emitter and its positive side coupled to said collector through the series combination of a first resistor and the primary winding of a simple transformer; a second voltage source coupled between said collector and said emitter, wherein said second voltage source has its negative side directly connected to said emitter and its positive side coupled to said collector through a pair of series connected oppositely poled diodes; a capacitor connected between the positive side of said first voltage source and the common point of said series connected diodes; means directly connecting said common point of said series connected diodes and the common point of said series combination of said first resistor and said primary winding of said simple transformer; a thyristor input gate circuit connected across the secondary winding of said simple transformer; a second resistor connected between said base electrode and said emitter electrode; and input pulse means adapted to apply an input pulse acrosS said base and emitter electrodes of said transistor, said pulse means having an output pulse configuration such that said transistor operates in the avalanche break down mode during the initial portion of said input pulse and operates in a conventional amplifier mode during the balance of said input pulse.
Claim 2
Dependent Claim
247 words
A pulse generating circuit comprising: a transistor having a base electrode, an emitter electrode, and a collector electrode; a first voltage source coupled between said collector and said emitter, wherein said first voltage source has its negative side directly connected to said emitter and its positive side coupled to said collector through the series combination of a first resistor and the primary winding of a simple transformer; a second voltage source coupled between said collector and said emitter, wherein said second voltage source has its negative side directly connected to said emitter and its positive side coupled to said collector through a pair of series connected oppositely poled diodes; a capacitor connected between the positive side of said first voltage source and the common point of said series connected diodes; means directly connecting said common point of said series connected diodes and the common point of said series combination of said first resistor and said primary winding of said simple transformer; a thyristor input gate circuit connected across the secondary winding of said simple transformer; a second resistor connected between said base electrode and said emitter electrode; and input pulse means adapted to apply an input pulse acrosS said base and emitter electrodes of said transistor, said pulse means having an output pulse configuration such that said transistor operates in the avalanche break down mode during the initial portion of said input pulse and operates in a conventional amplifier mode during the balance of said input pulse.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-01-21 | 1977-07-23 | 1978-01-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-01-21 | 1981-07-23 | 1982-01-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-01-21 | 1985-07-23 | 1986-01-22 | $7700.00 | Window Closed / Lapsed |