Matrix keyboard method and apparatus

Claim 2

A keyboard system, comprising: clock means for producing electrical signal pulses; at least one input and at least one output conductor means for conducting said signal pulses; at least one selectively actuable key means for coupling said pulses from said input conductor means to said output conductor means; at least one selectively actuable detecting means for sensing the presence of said pulses on said output conductor means in response to an actuation of said key means; coded address generating means for generating different multibit coded addresses; decoder means connected to said address generating means for decoding said addresses to provide enabling signals for only one said input conductor means and only one said detecting means; gate means responsive to said enabling signals and connected to said decoder means for the receipt of said enabling signals therefrom, and connected also to said clock means for the receipt of said pulses therefrom, for gating said pulses to said input conductor means and also being connected to said detecting means for selectively actuating said detecting means in response to said enabling signals; and output means connected to said detecting means and responsive to the detection of pulses thereby, for outputting digitally coded signals representative of the identity of said key means.

Claim 3

A keyboard system as described in claim 1, wherein: said output means comprises gate means connected to said detecting means and to said address generating means for outputting said coded address generated by said means at the time said pulse signals are detected on said output conductor by said detecting means.

Claim 4

A keyboard system as described in claim 1, wherein said output means further comprises: a readable-only storage means having coded data stored therein in association with said coded addresses generated by said generating means; and output controlling means for outputting said stored data associated with the particular said address generated by said address generating meanS at the time said pulse signals are detected on said output conductor by said detecting means.

Claim 5

A keyboard system as described in claim 1, wherein: said coded address generating means comprises an addressable readable-only storage means having coded address locations therein, each said address location containing another said address in addition to said data; an output storage means connected to said readable-only storage means for receipt of said address and said data from said readable-only storage means; and an access and data storage means connected to said output storage means for the receipt of said address and said data therefrom and responsive thereto for accessing said location defined in said readable-only storage means by said address.

Claim 6

A keyboard system as described in claim 4, wherein: said access and data storing means further comprises a means responsive to a control bit appearing in said address to access a location in said readable-only storage means which is defined by said data from said output storage means instead of said address.

Claim 7

A keyboard system as described in claim 5, wherein said access and data storing means further comprises: means connecting said access and data storing means to an external stimulus for providing a branch bit for modifying said data from said output storage means, thereby defining a new location in said readable-only storage means for accessing later.

Claim 8

A keyboard system as described in claim 1, further comprising: checking means connected with said detecting means for determining whether signals detected by said detecting means are valid pulse signals.

Claim 9

A keyboard system as described in claim 7, wherein said checking means comprises: a voltage threshold level sensing means for indicating that signals sensed exceed a voltage threshold level; memory means connected to said sensing means and to said clock means for storing an indication that a first signal has been sensed in excess of said threshold coincident with a pulse from said clock; and comparison means connected to said memory means for determining whether, at the next pulse from said clock, another signal in excess of said threshold has been sensed, and output means connected to said comparison means for outputting a signal indicative that a comparison was found, thereby identifying the detection of valid pulse signals by said detecting means.

Claim 10

A keyboard system as described in claim 8, wherein said checking means further comprises: a voltage threshold varying means connected to said voltage level threshold sensing means for lowering said threshold level whenever said comparison means indicates that valid pulses have been detected, thereby facilitating the identification of a true release of said key means by the dropping of voltage signals sensed below said lowered threshold.

Claim 11

A keyboard system, comprising: clock means for producing electrical signal pulses; at least one input and at least one output conductor means for conducting said signal pulses; at least one selectively actuable key means for coupling said pulses from said input conductor means to said output conductor means; at least one selectively actuable detecting means for sensing the presence of said pulses on said output conductor means in response to an actuation of said key means; coded address generating means for generating different multi-bit coded addresses; decoder means connected to said address generating means for decoding said addresses to provide enabling signals for only one said input conductor means and only one said detecting means; gate means responsive to said enabling signals and connected to said decoder means for the receipt of said enabling signals therefrom, and connected also to said clock means for the receipt of said pulses therefrom, for gating said pulses to said input conductor means and also being connected to said detecting means for selectively activating sAid detecting means in response to said enabling signals; checking means connected with said detecting means for determining whether signals detected by said detecting means are valid pulse signals; and output means connected to said detecting means and responsive to the detection of valid pulses thereby, for outputting digitally coded signals representative of the identity of said key means.

Claim 12

A keyboard system, comprising: clock means for producing electrical signal pulses; at least one input and at least one output conductor means for conducting said signal pulses; at least one selectively actuable key means for coupling said pulses from said input conductor means to said output conductor means; at least one selectively actuable detecting means for sensing the presence of said pulses on said output conductor means in response to an actuation of said key means; coded address generating means for generating different multi-bit coded addresses; decoder means connected to said address generating means for decoding said addresses to provide enabling signals for only one said input conductor means and only one said detecting means; gate means responsive to said enabling signals and connected to said decoder means for the receipt of said enabling signals therefrom, and connected also to said clock means for the receipt of said pulses therefrom, for gating said pulses to said input conductor means and also being connected to said detecting means for selectively activating sAid detecting means in response to said enabling signals; checking means connected with said detecting means for determining whether signals detected by said detecting means are valid pulse signals; and output means connected to said detecting means and responsive to the detection of valid pulses thereby, for outputting digitally coded signals representative of the identity of said key means.

Claim 13

A keyboard system as described in claim 10, wherein: said output means comprises gate means connected to said detecting means and to said address generating means for outputting said coded address generated by said means at the time said valid pulse signals are detected on said output conductor by said detecting means.

Claim 14

A keyboard system as described in claim 10, wherein said output means further comprises: a readable-only storage means having coded data stored therein in association with said coded addresses generated by said generating means; and output controlling means for outputting said stored data associated with the particular said address generated by said address generating means at the time said pulse signals are detected on said output conductor by said detecting means.

Claim 15

A keyboard system comprising: clock means for producing electrical signal pulses; at least one input and at least one output conductor means for conducting said signal pulses; at least one selectively actuable key means for coupling said pulses from said input conductor means to said output conductor means; at least one selectively actuable detecting means for sensing the presence of said pulses on said output conductor means in response to an actuation of said key means; coded address generating means for generating different multi-bit coded addresses; decoder means connected to said address generating means for decoding said addresses to provide enabling signals for only one said input conductor means and only one said detecting means; gate means responsive to said enabling signals and connected to said decoder means for the receipt of said enabling signals therefrom, and connected also to said clock means for the receipt of said pulses therefrom, for gating said pulses to said input conductor means and also being connected to said detecting means for selectively actuating said detecting means in response to said enabling signals; means connected to said detecting means and to said address generating means for preventing erroneous data output when more than one said key is actuated at the same time, said means comprising a circulating storage device and controls for loading addresses produced by said address generating means into said device, said controls including means for comparing each address generated by said address generating means with the then existing contents of said storage device, and means for entering addresses from said address generating device into said storage device whenever an address is generated and a key is simultaneously detected as actuated, and said address is not then found in said storage device, and means for removing said address if it is found in said storage device and a key is not detected as activated, and further including means for inhibiting the output of data by the following output means if a key is sensed as activated when said address is generated and said address is then found in said storage device; and output means, connected to said detecting means and responsive to the detection of pulses thereby, for outputting digitally coded signals representative of the identity of said key means.

Claim 16

A keyboard system comprising: clock means for producing electrical signal pulses; at least one input and at least one output conductor means for conducting said signal pulses; at least one selectively actuable key means for coupling said pulses from said input conductor means to said output conductor means; at least one selectively actuable detecting means for sensing the presence of said pulses on said output conductor means in response to an actuation of said key means; coded address generating means for generating different multi-bit coded addresses; decoder means connected to said address generating means for decoding said addresses to provide enabling signals for only one said input conductor means and only one said detecting means; gate means responsive to said enabling signals and connected to said decoder means for the receipt of said enabling signals therefrom, and connected also to said clock means for the receipt of said pulses therefrom, for gating said pulses to said input conductor means and also being connected to said detecting means for selectively actuating said detecting means in response to said enabling signals; means connected to said detecting means and to said address generating means for preventing erroneous data output when more than one said key is actuated at the same time, said means comprising a circulating storage device and controls for loading addresses produced by said address generating means into said device, said controls including means for comparing each address generated by said address generating means with the then existing contents of said storage device, and means for entering addresses from said address generating device into said storage device whenever an address is generated and a key is simultaneously detected as actuated, and said address is not then found in said storage device, and means for removing said address if it is found in said storage device and a key is not detected as activated, and further including means for inhibiting the output of data by the following output means if a key is sensed as activated when said address is generated and said address is then found in said storage device; and output means, connected to said detecting means and responsive to the detection of pulses thereby, for outputting digitally coded signals representative of the identity of said key means.

Claim 19

Matrix scanner apparatus for individually scanning the crosspoints of an N column times M row matrix of electrical conductors by energizing single row and column combination, comprising: an address memory means for storing addresses of specific matrix locations, said memory means being non-destructing readable; an address decoder means connected to said memory means for the receipt of addresses therefrom for decoding said address to energize one out of M and one out of N conductors in said matrix; and control means connected to said memory means for causing addresses stored therein to be read out and responsive thereto for causing an address in said memory identified by said read out address to be accessed for a succeeding readout operation.

Claim 20

Matrix scanner apparatus for individually scanning the crosspoints of an N column times M row matrix of electrical conductors by energizing single row and column combination, comprising: an address memory means for storing addresses of specific matrix locations, said memory means being non-destructing readable; an address decoder means connected to said memory means for the receipt of addresses therefrom for decoding said address to energize one out of M and one out of N conductors in said matrix; and control means connected to said memory means for causing addresses stored therein to be read out and responsive thereto for causing an address in said memory identified by said read out address to be accessed for a succeeding readout operation.