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US3786491A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital integration apparatus and method

Assignee: Westinghouse Electric Corp
•
Filing: 1972-07-05
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Granted: 1974-01-15
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Expires: 1992-07-05
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Abstract

Abstract A digital integration apparatus and method which utilizes pulse count division to provide a broad range of easily selectable time constants. Pulses generated by a voltage-to-pulse conversion are divided down by a factor of 2 in a number of selectable steps and accumulated in a digital counter. A digital-to-analog conversion generates an output signal proportional to the accumulated count. A continuoous selection of time constants over an extended range is available through selection of the desired step of pulse count division followed by vernier adjustment of the conversion ratio of the voltage-to-pulse conversion. The invention is described as applied to compensation networks utilized in instrumentation circuitry.

Inventors

  • 👤 J Carleton

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 07:31
CPC Classifications
G; G06; G06J; G06J1/00

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 88 words
A digital integrator with an adjustable time constant including: voltage-to-pulse conversion means for generating pulses at a frequency proportional to the magnitude of an applied voltage signal, a digital counter for accumulating a count of the pulses generated by the voltage to pulse conversion means, and frequency conversion means connected between the voltage to pulse conversion means and the counter and operative to selectively alter the frequency of pulses applied to the counter from the voltage to pulse converter and thereby alter the time constant of the integrator.
Claim 2
Dependent Claim 88 words
A digital integrator with an adjustable time constant including: voltage-to-pulse conversion means for generating pulses at a frequency proportional to the magnitude of an applied voltage signal, a digital counter for accumulating a count of the pulses generated by the voltage to pulse conversion means, and frequency conversion means connected between the voltage to pulse conversion means and the counter and operative to selectively alter the frequency of pulses applied to the counter from the voltage to pulse converter and thereby alter the time constant of the integrator.
Claim 3
Dependent Claim 30 words
The digital integrator of claim 1 including a digital to analog converter connected to the digital counter and operative to generate an output voltage signal proportional to the accumulated count.
Claim 4
Dependent Claim 36 words
The digital integrator of claim 2 wherein the frequency conversion means includes count division means operative to selectively reduce the frequency of the pulses applied to the digital counter from the voltage to pulse conversion means.
Claim 5
Dependent Claim 43 words
The digital integrator of claim 3 wherein the count division means includes means for reducing the frequency of the pulses applied to the digital counter from the voltage to pulse conversion means by a factor of two in steps over an extended range.
Claim 6
Dependent Claim 38 words
The digital integrator of claim 4 including means for varying the ratio of the frequency of the pulses generated by the voltage to frequency conversion means to the applied signal continuously over a range of 2 to 1.
Claim 7
Dependent Claim 95 words
A digital integrator comprising: a voltage to pulse converter for generating pulses at a rate proportional to the magnitude of an applied voltage, count divider means connected to the output of the voltage to pulse converter and operative to gate a pulse from the voltage to pulse converter for each predetermined number of pulses generated by the voltage to pulse converter, a digital counter for accumulating a count of the gated pulses, and a digital to anAlog converter connected to the digital counter and operative to generate a voltage signal proportional to the accumulated count.
Claim 8
Dependent Claim 95 words
A digital integrator comprising: a voltage to pulse converter for generating pulses at a rate proportional to the magnitude of an applied voltage, count divider means connected to the output of the voltage to pulse converter and operative to gate a pulse from the voltage to pulse converter for each predetermined number of pulses generated by the voltage to pulse converter, a digital counter for accumulating a count of the gated pulses, and a digital to anAlog converter connected to the digital counter and operative to generate a voltage signal proportional to the accumulated count.
Claim 9
Dependent Claim 52 words
The digital integrator of claim 6 wherein the digital counter is a reversible digital counter, said combination including up-down logic means responsive to the polarity of the applied signal and operative to direct the gated pulses to the count up or count down input of the reversible digital counter in response thereto.
Claim 10
Dependent Claim 89 words
The digital integrator of claim 7 wherein said count divider includes: a binary counter, having a plurality of bits means for applying the pulses generated by the voltage-to-pulse converter to the input of said binary counter, and gating means controlled by a preselected one of said bits of the binary counter and operative to gate to the output of the count divider one and only one of the pulses generated by the voltage to pulse converter each time the preselected bit of the binary counter assumes a predetermined state.
Claim 11
Dependent Claim 29 words
The digital integrator of claim 8 including means for selecting one of a plurality of said bits of said binary counter to control the operation of said gating means.
Claim 12
Dependent Claim 38 words
The digital integrator of claim 9 including means for varying the ratio of the frequency of the pulses generated by the voltage to pulse converter to the applied signal over a range of at least 2 to 1.
Claim 13
Dependent Claim 53 words
The digital integrator of claim 8 wherein the binary counter is a reversible binary counter and wherein the up/down logic means is operative to direct the pulses from the voltage-to-pulse converter to the count up or count down input of the reversible binary counter in response to the polarity of the applied signal.
Claim 14
Independent Claim 68 words
A method of digitally integrating an analog input signal and of providing an adjustable time constant for the integration comprising the steps of: converting the analog signal to a first pulse signal, selectively converting the first pulse signal to a second pulse signal having a related frequency, accumulating a count of the pulses in the second pulse signal, and converting the accumulated count to an analog output signal.
Claim 15
Independent Claim 68 words
A method of digitally integrating an analog input signal and of providing an adjustable time constant for the integration comprising the steps of: converting the analog signal to a first pulse signal, selectively converting the first pulse signal to a second pulse signal having a related frequency, accumulating a count of the pulses in the second pulse signal, and converting the accumulated count to an analog output signal.
Claim 16
Dependent Claim 29 words
The method of claim 12 wherein the step of converting the first pulse signal to a second pulse signal comprises the step of dividing down the first pulse signal.
Claim 17
Dependent Claim 39 words
The method of claim 13 wherein the step of dividing down the first pulse signal comprises the step of selectively dividing the pulses in the first pulse signal in steps by a factor of 2 over an extended range.
Claim 18
Dependent Claim 41 words
The method of claim 14 including the step of continuously varying the ratio of the frequency of the pulses in the first pulse signal to the magnitude of the analog input signal over a range of at least 2 to 1.

References Cited (Backward Citations)

US3313924A Cited
US3505673A Cited
US3500196A Cited
US3550018A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-01-14 1977-07-16 1978-01-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-01-14 1981-07-16 1982-01-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-01-14 1985-07-16 1986-01-15 $7700.00 Window Closed / Lapsed

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