US3786432A
Expired / Lapsed
US
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Push-pop memory stack having reach down mode and improved means for processing double-word items
Assignee: Bull HN Information Systems Italia SpA
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Filing: 1972-06-20
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Granted: 1974-01-15
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Expires: 1992-06-20
Abstract
Abstract A first in-last out (i.e. push-pop, push-down, or last in-first out) memory stack is implemented with means for reaching down into the stack without pushing or popping thereby allowing access to information which would not otherwise be immediately available. The stack also features improved processing of doubleword items by use of unique double push and double pop algorithms.
Inventors
- 👤 W Woods
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 11:29
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/76; G06F7/78; G06F7/785
Claims Analysis
Total Claims: 42
Claim 1
Independent Claim
241 words
Data processing apparatus comprising: A. a memory having a last in-first out memory stack operative such that the most recent information written into said stack is normally the information to be next read from said stack; B. memory register means; C. means, coupled to said memOry register means, for indicating the location in said memory to be addressed; D. means for enabling said memory register means to address the location in said memory indicated by said means for indicating; E. means for enabling the transfer of information between the addressed location in said memory and said memory register means; F. means for changing the addressed location indicated by said means for indicating in response to either the writing of information into said memory or the reading of information from said memory, said means for changing including means for updating said means for indicating by either incrementing or decrementing said means for indicating during said writing and/or reading with said stack; G. arithmetic means; H. means for indicating a displacement number associated with a location in said stack which is not the most recent location written into; I. means in said arithmetic means for operating on said displacement number representing the location indicated by said means for indicating to produce a reach-down address; and J. means for addressing said stack with said reachdown address in order to read or write information at said reach-down address without addressing other locations of said stack.
Claim 2
Dependent Claim
241 words
Data processing apparatus comprising: A. a memory having a last in-first out memory stack operative such that the most recent information written into said stack is normally the information to be next read from said stack; B. memory register means; C. means, coupled to said memOry register means, for indicating the location in said memory to be addressed; D. means for enabling said memory register means to address the location in said memory indicated by said means for indicating; E. means for enabling the transfer of information between the addressed location in said memory and said memory register means; F. means for changing the addressed location indicated by said means for indicating in response to either the writing of information into said memory or the reading of information from said memory, said means for changing including means for updating said means for indicating by either incrementing or decrementing said means for indicating during said writing and/or reading with said stack; G. arithmetic means; H. means for indicating a displacement number associated with a location in said stack which is not the most recent location written into; I. means in said arithmetic means for operating on said displacement number representing the location indicated by said means for indicating to produce a reach-down address; and J. means for addressing said stack with said reachdown address in order to read or write information at said reach-down address without addressing other locations of said stack.
Claim 3
Dependent Claim
38 words
Apparatus as in claim 1 wherein said means for changing updates said addressed location before information is written into said memory and wherein said means for changing updates said addressed location after information is read from said memory.
Claim 4
Dependent Claim
10 words
means for transferring said first address to saId first register,
Claim 5
Dependent Claim
10 words
means for transferring said first address to saId first register,
Claim 6
Dependent Claim
10 words
means for transferring said first address to said first register,
Claim 7
Dependent Claim
10 words
means for transferring said first address to said first register,
Claim 8
Dependent Claim
9 words
means for addressing said stack with said first address,
Claim 9
Dependent Claim
9 words
means for addressing said stack with said first address,
Claim 10
Dependent Claim
9 words
means for addressing said stack with said first address,
Claim 11
Dependent Claim
9 words
means for addressing said stack with said first address,
Claim 12
Dependent Claim
24 words
Apparatus as in claim 1 further comprising a first register coupled to receive each address received by said memory from said memory register means.
Claim 13
Dependent Claim
161 words
Apparatus as in claim 3 wherein said information in each of said locations in said stack are words and further comprising means for writing each word of a double word item into successive locations of said stack, said means for writing comprising: A. means, included in said means for changing, for updating the number of the addressed location indicated by said means for indicating in a first direction to produce a first address; B. means, coupled with each of said means for enabling, for writing the first word of said double word item in the location indicated by said first address; C. means for updating the address included in said first register in said first direction in order to produce a second address; and D. means enabling said first register to provide said second address to said memory in order to enable the writing of the second word of said double word item in the location indicated by said second address.
Claim 14
Dependent Claim
23 words
means for reading a first word of said double word item from the word location of said stack indicated by said first address,
Claim 15
Dependent Claim
23 words
means for reading a first word of said double word item from the word location of said stack indicated by said first address,
Claim 16
Dependent Claim
23 words
means for writing a first word of said double word item into the word location of said stack indicated by said first address,
Claim 17
Dependent Claim
23 words
means for writing a first word of said double word item into the word location of said stack indicated by said first address,
Claim 18
Dependent Claim
22 words
means for changing said first address in said first register by one address in said first direction to produce a second address,
Claim 19
Dependent Claim
22 words
means for changing said first address in said first register by one address in said first direction to produce a second address,
Claim 20
Dependent Claim
52 words
means for changing said first address in said stack pointer by one address in said second direction to produce a third address, said third address pointing to the next to be read from word location in said stack after the second word of said double word item is read from said stack,
Claim 21
Dependent Claim
52 words
means for changing said first address in said stack pointer by one address in said second direction to produce a third address, said third address pointing to the next to be read from word location in said stack after the second word of said double word item is read from said stack,
Claim 22
Dependent Claim
169 words
Apparatus as in claim 3 wherein said information in each of said locations in said stack are words and further comprising means for reading each word of a double word item from successive locations of said stack, said means for reading comprising: A. means, included in said means for changing, for updating the number of the addressed location indicated by said means for indicating in a second direction to produce a first address; B. wherein said memory register means provides said first address to said memory in order to enable the reading of the second word of said double word item from the location indicated by said first address; C. means for updating the address included in said first register in a first direction in order to produce a second address; and D. means enabling said first register to provide said second address to said memory in order to enable the reading of the first word of said double word item from the location indicated by said second address.
Claim 23
Dependent Claim
51 words
Apparatus as in claim 5 further comprising means for causing said means for updating to update the number of the addressed location indicated by said means for indicating in said second direction to produce a third address, said third address being the address of the next location to be read from.
Claim 24
Dependent Claim
22 words
means for changing said first address in said first register by one address in a first direction to produce a second address,
Claim 25
Dependent Claim
22 words
means for changing said first address in said first register by one address in a first direction to produce a second address,
Claim 26
Dependent Claim
10 words
means for addressing said stack with said second address, and
Claim 27
Dependent Claim
10 words
means for addressing said stack with said second address, and
Claim 28
Dependent Claim
23 words
means for writing a second word of said double word item into the word location of said stack indicated by said second address.
Claim 29
Dependent Claim
23 words
means for writing a second word of said double word item into the word location of said stack indicated by said second address.
Claim 30
Dependent Claim
10 words
means for addressing said stack with said second address, and
Claim 31
Dependent Claim
10 words
means for addressing said stack with said second address, and
Claim 32
Dependent Claim
171 words
Data processing apparatus comprising: A. a last in-first out memory stack, said stack operative such that the most recent information written into said stack is normally the information to be next read from said stack; B. a stack pointer for providing an address of a location in said stack, said stack pointer normally including an address pointing to the next to be read from location in said stack; C. means for changing the address location indicated by said stack pointer in response to instructions directing either the writing of information into said stack or the reading of information from said stack; D. means for indicating a displacement address; E. means for operating on said displacement address and said address normally included in said stack pointer to generate a first address; and F. means for addressing said stack with said first address in order to read or write information at said location in said stack represented by said first address without addressing the location of more recently written information in said stack.
Claim 33
Dependent Claim
171 words
Data processing apparatus comprising: A. a last in-first out memory stack, said stack operative such that the most recent information written into said stack is normally the information to be next read from said stack; B. a stack pointer for providing an address of a location in said stack, said stack pointer normally including an address pointing to the next to be read from location in said stack; C. means for changing the address location indicated by said stack pointer in response to instructions directing either the writing of information into said stack or the reading of information from said stack; D. means for indicating a displacement address; E. means for operating on said displacement address and said address normally included in said stack pointer to generate a first address; and F. means for addressing said stack with said first address in order to read or write information at said location in said stack represented by said first address without addressing the location of more recently written information in said stack.
Claim 34
Dependent Claim
49 words
Apparatus as in claim 7 further comprising: A. an index register; B. a memory, said memory including said stack; and C. switch means for enabling the contents of said index register to address said memory, said switch means including means for inhibiting said stack pointer from addressing said stack.
Claim 35
Dependent Claim
23 words
means for reading said second word of said double word item from the word location of said stack indicated by said second address.
Claim 36
Dependent Claim
23 words
means for reading said second word of said double word item from the word location of said stack indicated by said second address.
Claim 37
Dependent Claim
57 words
Apparatus as in claim 8 wherein the contents of both said stack pointer and said index register provide a displacement address from a reference address and wherein said switch means is coupled to transfer the contents of either said index register or said stack pointer to said means for operating in order to generate said first address.
Claim 38
Dependent Claim
90 words
Data processing apparatus comprising: A. a memory stack operative such that the most recent word written into said stack is the word to be next read from said stack; B. a stack pointer for providing an address of a word location in said stack, said pointer normally including an address of the next to be read from word location in said stack; C. a first register; and D. means for writing each word of a double word item into successive word locations of said stack, said means for writing comprising:
Claim 39
Dependent Claim
90 words
Data processing apparatus comprising: A. a memory stack operative such that the most recent word written into said stack is the word to be next read from said stack; B. a stack pointer for providing an address of a word location in said stack, said pointer normally including an address of the next to be read from word location in said stack; C. a first register; and D. means for writing each word of a double word item into successive word locations of said stack, said means for writing comprising:
Claim 40
Dependent Claim
45 words
Apparatus as in claim 10 further comprising means for changing said first address in said stack pointer by one address in said first direction to produce said second address, said second address pointing to the next to be read from word location in said stack.
Claim 41
Dependent Claim
90 words
Data processing apparatus comprising: A. a memory stack operative such that the most recent word written into said stack is the word to be next read from said stack; B. a stack pointer for providing an address of a word location in said stack, said pointer normally including an address of the next to be read from word location in said stack; C. a first register; and D. means for reading each word of a double word item from successive word locations of said stack, said means for reading comprising:
Claim 42
Dependent Claim
90 words
Data processing apparatus comprising: A. a memory stack operative such that the most recent word written into said stack is the word to be next read from said stack; B. a stack pointer for providing an address of a word location in said stack, said pointer normally including an address of the next to be read from word location in said stack; C. a first register; and D. means for reading each word of a double word item from successive word locations of said stack, said means for reading comprising:
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-01-14 | 1977-07-16 | 1978-01-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-01-14 | 1981-07-16 | 1982-01-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-01-14 | 1985-07-16 | 1986-01-15 | $7700.00 | Window Closed / Lapsed |