Frame-by-frame video image recording apparatus

Claim 2

A video image recording system for selectively recording one or more video images comprising: means receptive in use of video signals having synchronizing pulse signals each signal corresponding in time to a discrete frame comprising a plurality of fields and in which a video image is to be displayed: separating means for separating said synchronizing pulse signals from said video signals; a display device for displaying a video image in said discrete frame when enabled comprising means receptive of said video signals for converting said video signals to video images; start switch means for selectively generating a start signal when a selected video image is to be recorded; single-frame gate means receptive of said synchronizing pulse signals and responsive to said start signal for enabling displaying of said selected video image in said discrete frame on said display device; and recording means for recording all of said plurality of fields of said discrete frame of said selected video image displayed on said display device including feed means for feeding a recording medium when enabled and feed control means receptive of said start signal for enabling said feed means after all of said plurality of fields of said discrete frame of said selected video image have been recorded.

Claim 3

A video image recording system according to claim 1, wherein said single-frame gate means comprises means co-active with said feed control means thereby to record successive video images on successive discrete frames on said recording medium.

Claim 4

A video image recording system according to claim 1, wherein said single-frame gate means comprises a one-half-frequency divider receptIve of said synchronizing pulse signals for producing pulse signals having a repetition frequency one-half that of said synchronizing pulse signals, a monostable multivibrator receptive of said start signal from said start switch means for producing a trigger signal having a pre-selected pulse width, an AND gate connected to said one-half-frequency divider and said monostable multivibrator for passing said pulse signal from said one-half-frequency divider therethrough when supplied with said start signal from said monostable multivibrator, a flip-flop connected to said AND gate and said one-half-frequency divider for producing a single-frame pulse signal having a pulse width equal to a duration between the leading edges of said pulse passed through said AND gate and a succeeding pulse of said pulse passed through said AND gate, a driver gate receptive of said single-frame pulse signal from said flip-flop for producing a drive signal having a pulse width equal to that of said single-frame pulse signal, gate means receptive of said drive signal from said driver gate and a voltage source connected to said gate means for applying a voltage signal therethrough when said gate means receives said drive signal.

Claim 5

A video image recording system according to claim 1, wherein said feed control means comprises a d.c. power source having a positive and a negative terminal, a first relay timing circuit including a first resistor connected at one terminal to said positive terminal of said d.c. power source, a first capacitor, a first relay coil having a normally-closed contact pair and a normally-open contract pair and having one terminal of the first coil connected through said first capacitor to the other terminal of said first resistor and the other terminal of said first coil connected to said negative terminal of said power source, a first diode shunting said first relay coil and forward-directed from said one terminal to said other terminal of said first coil, and a normally-open switch connected to said other terminal of said first resistor and said negative terminal discharging said first capacitor therethrough when actuated by said start signal from said start switch means; a second relay timing circuit including a second resistor connected at one terminal to said positive terminal, a second capacitor, a second relay coil having four normally-open contact pairs and having one terminal connected through said second capacitor to the other terminal of said second resistor and the other terminal connected to said negative terminal, a second diode shunting said second coil and forward-directed from said one terminal to said other terminal of said second coil, and said normally-open contact-pairs associated with said first coil and one normally-open contact pair of said second coil both connected between the other terminal of said second resistor and said negative terminal for discharging said second capacitor therethrough when closed; a third relay timing circuit including a third resistor connected at one terminal to said positive terminal, a third capacitor, a third relay coil having a normally-open contact pair and having one terminal connected through said third capacitor to the other terminal of said third resistor and the other terminal connected to said negative terminal, a third diode shunting said third coil and forward-directed from said one terminal to said other terminal of said third coil, and the second normally-open contact-pair associated with said second coil and said normally-open contact-pair associated with said third coil both connected between said other terminal of said third resistor and said negative terminal for discharging said third capacitor therethrough when closed; a fourth relay timing circuit including a fourth relay coil having a normally-open contact-pair, one terminal of said fourth relay coil being connected to said positive terminal through a parallel connection of said normally-open contact-pair of said fourth coil and a series connection of The third normally-open contact-pair associated with said second coil and said normally-closed contact-pair associated with said first coil, and the other terminal of said fourth relay coil being connected to said negative terminal through a parallel connection of the fourth normally-open contact-pair associated with said second coil and switch means for opening in response to said recording medium being fed a predetermined length, and said normally-open contact-pair associated with said fourth relay coil and connected to said positive terminal for producing an output voltage signal when said fourth coil is energized.

Claim 6

A video image recording system according to claim 1, further comprising a normally-open switch connected in parallel with said single frame gate means by-passing said gate means.