← Back to Patent Explorer
US3783379A Expired / Lapsed US ⏱️ 0.0 years remaining

Full wave peak respond meter

Assignee: MCINTOSH LABOR Inc
•
Filing: 1971-03-08
•
Granted: 1974-01-01
•
Expires: 1991-03-08
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A peak voltage detector responsive to a wide band AC signal, which detects both the negative and positive peaks of the signal, indicating which is the larger. The signal is applied to a transistor amplifier, and outputs are taken from equal collector and emitter loads through capacitors and diodes to a common high resistance load and a sustain timing capacitor in parallel to the load. The voltage across the latter is applied to the base of an emitter loaded Darlington amplifier. The emitter load includes a meter in series with a second time constant circuit. The function of the second time constant circuit is to accelerate upward deflection of the meter. The function of the first time constant circuit is to hold a charge long enough to maintain the meter reading for a time after the peak pulse has passed.

Inventors

  • 👤 M Nestorovic

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 21:09
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/04

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 287 words
A peak voltmeter for an asymmetrical complex audio wave having alternative peak values of opposite polarities which may be unequal, comprising a first transistor having a base, an emitter, and a collector, equal resistive emitter and collector loads for said first transistor, means applying said wave to said base, a resistive load circuit, means comprising a first capacitor and a first diode, in series connected between said emitter and said load, said first diode having its anode coupled to said emitter, means comprising a second capacitor and a second diode in series connected between said collector and said load, said second diode having its anode coupled to said collector, whereby said load carries a voltage having the peak value of said audio wave regardless of polarity of said peak value of said audio wave, a second transistor having a base, an emitter and a collector, and a storage capacitor connected across said load and to said base of said second transistor, said storage capacitor having a relatively low impedance charging path through said diodes and having a relatively high impedance discharge path including said resistive load circuit, said storage capacitor and said relatively high impedance discharge path being adequately long to store a voltage corresponding with the higher of said peak values only, wherein said meter circuit includes a meter and a capacitor further connected in series between said emitter of said second transistor and a point of reference potential, said further capacitor having sufficient capacity to permit transient flow of current to said meter on increase of current through said second transistor sufficient to drive said meter offscale if applied steady state, and diode bias means normally maintaining said second transistor at the edge of conduction.
Claim 2
Dependent Claim 287 words
A peak voltmeter for an asymmetrical complex audio wave having alternative peak values of opposite polarities which may be unequal, comprising a first transistor having a base, an emitter, and a collector, equal resistive emitter and collector loads for said first transistor, means applying said wave to said base, a resistive load circuit, means comprising a first capacitor and a first diode, in series connected between said emitter and said load, said first diode having its anode coupled to said emitter, means comprising a second capacitor and a second diode in series connected between said collector and said load, said second diode having its anode coupled to said collector, whereby said load carries a voltage having the peak value of said audio wave regardless of polarity of said peak value of said audio wave, a second transistor having a base, an emitter and a collector, and a storage capacitor connected across said load and to said base of said second transistor, said storage capacitor having a relatively low impedance charging path through said diodes and having a relatively high impedance discharge path including said resistive load circuit, said storage capacitor and said relatively high impedance discharge path being adequately long to store a voltage corresponding with the higher of said peak values only, wherein said meter circuit includes a meter and a capacitor further connected in series between said emitter of said second transistor and a point of reference potential, said further capacitor having sufficient capacity to permit transient flow of current to said meter on increase of current through said second transistor sufficient to drive said meter offscale if applied steady state, and diode bias means normally maintaining said second transistor at the edge of conduction.
Claim 3
Dependent Claim 330 words
A peak voltmeter for indicating the input peak value regardless of polarity of a complex alternating current audio frequency signal, wherein said peak values may be of opposite polarities and of unequal emplitudes, comprising means responsive to said complex signal for generating a voltage having a reference peak value of only one polarity regardless of the polarities of the input peak values and functionally related in amplitude to the peak amplitudes of only the larger of said input peak values, regardless of the polarity of said larger of said input peak values, a storage capacitor, a transistor circuit having a control electrode and an output electrode, means applying said voltage commonly to said control electrode and across said storage capacitor, a meter responsive to current flow from said output electrode of said transistor circuit, and means biassing said transistor circuit at the edge of current flow from said output electrode, wherein said meter is connected to be responsive to current in an emitter circuit of said transistor circuit, and diode means biassing said transistor circuit at the edge of conduction, wherein said meter has a meter movement and is connected in series with a large acceleration capacitor having a capacitance selected to provide a ballistic impulse to said meter movement during increase of current through said meter movement, wherein said first mentioned means is a full wave rectifier, wherein saiD full wave rectifier includes a further transistor having a base, an emitter and a collector, equal resistive loads connected in the emitter and collector circuits of said further transistor, equal dc isolating capacitors having one a terminal connected to said collector and the other a terminal connected to said emitter of said further transistor, and a common load including said storage capacitor across which full wave rectified voltage is developed connected as a load for said full wave rectifier, and wherein said full wave rectifier further comprises two diodes connected respectively between said dc isolating capacitors and said storage capacitor.
Claim 4
Dependent Claim 330 words
A peak voltmeter for indicating the input peak value regardless of polarity of a complex alternating current audio frequency signal, wherein said peak values may be of opposite polarities and of unequal emplitudes, comprising means responsive to said complex signal for generating a voltage having a reference peak value of only one polarity regardless of the polarities of the input peak values and functionally related in amplitude to the peak amplitudes of only the larger of said input peak values, regardless of the polarity of said larger of said input peak values, a storage capacitor, a transistor circuit having a control electrode and an output electrode, means applying said voltage commonly to said control electrode and across said storage capacitor, a meter responsive to current flow from said output electrode of said transistor circuit, and means biassing said transistor circuit at the edge of current flow from said output electrode, wherein said meter is connected to be responsive to current in an emitter circuit of said transistor circuit, and diode means biassing said transistor circuit at the edge of conduction, wherein said meter has a meter movement and is connected in series with a large acceleration capacitor having a capacitance selected to provide a ballistic impulse to said meter movement during increase of current through said meter movement, wherein said first mentioned means is a full wave rectifier, wherein saiD full wave rectifier includes a further transistor having a base, an emitter and a collector, equal resistive loads connected in the emitter and collector circuits of said further transistor, equal dc isolating capacitors having one a terminal connected to said collector and the other a terminal connected to said emitter of said further transistor, and a common load including said storage capacitor across which full wave rectified voltage is developed connected as a load for said full wave rectifier, and wherein said full wave rectifier further comprises two diodes connected respectively between said dc isolating capacitors and said storage capacitor.
Claim 5
Dependent Claim 169 words
A peak voltmeter, comprising a source of ac voltage having randomly occurring positive and negative peaks which may be unequal in peak values, a first transistor having a base, an emitter and a collector, means connecting said source to said base, a resistive collector load for said first transistor, a resistive emitter load for said first transistor, said collector and emitter loads being equal, a common load resistance, means comprising a first capacitor and a first diode in series for passing signal from said collector to said common load resistance, means comprising a second capacitor and a second diode for passing signal from said emitter to said common load, a peak voltage meter circuit responsive to voltage across said common resistance for indicating the value of the peak voltage across said common resistance, said peak voltage meter circuit including a further transistor having a base, a timing sustain capacitor connected across said common load resistance, and to said base, and a meter connected in series with said further transistor.
Claim 6
Dependent Claim 169 words
A peak voltmeter, comprising a source of ac voltage having randomly occurring positive and negative peaks which may be unequal in peak values, a first transistor having a base, an emitter and a collector, means connecting said source to said base, a resistive collector load for said first transistor, a resistive emitter load for said first transistor, said collector and emitter loads being equal, a common load resistance, means comprising a first capacitor and a first diode in series for passing signal from said collector to said common load resistance, means comprising a second capacitor and a second diode for passing signal from said emitter to said common load, a peak voltage meter circuit responsive to voltage across said common resistance for indicating the value of the peak voltage across said common resistance, said peak voltage meter circuit including a further transistor having a base, a timing sustain capacitor connected across said common load resistance, and to said base, and a meter connected in series with said further transistor.
Claim 7
Dependent Claim 179 words
In a peak reading voltmeter, a storage capacitor, a fast charge circuit for charging said storage capacitor positively as a function of a peak of an audio signal regardless of polarity of that audio signal, a Darlington amplifier having an input base and an output emitter, means connecting said storage capacitor between said input base and ground, a milliammeter, an accelerating capacitor, a current limiting resistance, a negative voltage terminal, means connecting said milliammeter, said accelerating capacitor and said current limiting resistance between said emitter and said negative voltage terminal in the order recited, a diode having its cathode directly connected between the junction of said accelerating capacitor and said current limiting resistance and its anode directly connected to ground, a range calibration resistance connected across said accelerating capacitor, a resistive path shunting said accelerating capacitor to provide an alternative current path for current around said milliammeter, and a long time constant discharge resistance connected across said storage capacitor, said range calibration resistance having a value selected to provide a short time constant discharge path for said accelerating capacitor.
Claim 8
Dependent Claim 179 words
In a peak reading voltmeter, a storage capacitor, a fast charge circuit for charging said storage capacitor positively as a function of a peak of an audio signal regardless of polarity of that audio signal, a Darlington amplifier having an input base and an output emitter, means connecting said storage capacitor between said input base and ground, a milliammeter, an accelerating capacitor, a current limiting resistance, a negative voltage terminal, means connecting said milliammeter, said accelerating capacitor and said current limiting resistance between said emitter and said negative voltage terminal in the order recited, a diode having its cathode directly connected between the junction of said accelerating capacitor and said current limiting resistance and its anode directly connected to ground, a range calibration resistance connected across said accelerating capacitor, a resistive path shunting said accelerating capacitor to provide an alternative current path for current around said milliammeter, and a long time constant discharge resistance connected across said storage capacitor, said range calibration resistance having a value selected to provide a short time constant discharge path for said accelerating capacitor.
Claim 9
Dependent Claim 209 words
A peak voltmeter, comprising a source of audio voltage having randomly occurring positive and negative peaks which may be unequal in peak values, a full wave rectifier having a load resistance across which is developed a rectified replica of said audio voltage, a storage capacitor connected across said load resistance, said storage capacitor and load resistance having a time constant sufficiently long to store a voltage proportional to only the higher of said peaks, a peak voltage meter circuit responsive to voltage across said capacitor for indicating the value of the peak voltage across said capacitor, said peak voltage circuit including a further transistor circuit having a base connected to said capacitor and having an emitter output electrode, and a meter connected in series between said emitter output electrode and ground, wherein is provided a diode bias circuit connected to said emitter output electrode and providing bias for said further transistor circuit maintaining said transistor bias circuit at the edge of conduction of current from said output electrode, wherein said peak voltage meter circuit includes a meter connected in series with said emitter output electrode, a meter accelerating capacitor connected between said meter and a point of reference potential, and a range calibrating resistance shunting said meter accelerating capacitor.
Claim 10
Dependent Claim 209 words
A peak voltmeter, comprising a source of audio voltage having randomly occurring positive and negative peaks which may be unequal in peak values, a full wave rectifier having a load resistance across which is developed a rectified replica of said audio voltage, a storage capacitor connected across said load resistance, said storage capacitor and load resistance having a time constant sufficiently long to store a voltage proportional to only the higher of said peaks, a peak voltage meter circuit responsive to voltage across said capacitor for indicating the value of the peak voltage across said capacitor, said peak voltage circuit including a further transistor circuit having a base connected to said capacitor and having an emitter output electrode, and a meter connected in series between said emitter output electrode and ground, wherein is provided a diode bias circuit connected to said emitter output electrode and providing bias for said further transistor circuit maintaining said transistor bias circuit at the edge of conduction of current from said output electrode, wherein said peak voltage meter circuit includes a meter connected in series with said emitter output electrode, a meter accelerating capacitor connected between said meter and a point of reference potential, and a range calibrating resistance shunting said meter accelerating capacitor.
Claim 11
Dependent Claim 178 words
In a peak reading voltmeter, a storage capacitor, a fast charge circuit for charging said storage capacitor positively as a function of the peak of an audio signal regardless of polarity of that audio signal, an amplifier having an input base and an output emitter, means connecting said storage capacitor between said input base and ground, a milliammeter, an accelerating capacitor, a current limiting resistance, a negative voltage terminal, means connecting said milliammeter, said accelerating capacitor and said current limiting resistance between said emitter and said negative voltage terminal in the order recited, a diode having its cathode directly connected between the junction of said accelerating capacitor and said current limiting resistance and its anode directly connected to ground, a range calibration resistance connected across said accelerating capacitor, a resistive path shunting said accelerating capacitor to provide an alternative current path for current around said milliammeter, and a long time constant discharge resistance connected across said storage capacitor, said range calibration resistance having a value selected to provide a short time constant discharge path for said accelerating capacitor.
Claim 12
Dependent Claim 178 words
In a peak reading voltmeter, a storage capacitor, a fast charge circuit for charging said storage capacitor positively as a function of the peak of an audio signal regardless of polarity of that audio signal, an amplifier having an input base and an output emitter, means connecting said storage capacitor between said input base and ground, a milliammeter, an accelerating capacitor, a current limiting resistance, a negative voltage terminal, means connecting said milliammeter, said accelerating capacitor and said current limiting resistance between said emitter and said negative voltage terminal in the order recited, a diode having its cathode directly connected between the junction of said accelerating capacitor and said current limiting resistance and its anode directly connected to ground, a range calibration resistance connected across said accelerating capacitor, a resistive path shunting said accelerating capacitor to provide an alternative current path for current around said milliammeter, and a long time constant discharge resistance connected across said storage capacitor, said range calibration resistance having a value selected to provide a short time constant discharge path for said accelerating capacitor.

References Cited (Backward Citations)

US2678387A Cited
US2972677A Cited
US2999155A Cited
US3183435A Cited
US3492575A Cited
US3621404A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-12-31 1977-07-02 1978-01-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-12-31 1981-07-02 1982-01-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-12-31 1985-07-02 1986-01-01 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag