Arc elimination circuit

Claim 2

A circuit for eliminating acrs formed upon the opening or closing of a pair of contacts comprising a thyristor having first and second load electrodes and a control electrode, said load electrodes connected across said contacts, and logic circuit means having first and second inputs and an output, said output coupled to said control electrode, said first input coupled to a load voltage detector circuit, said load voltage detector circuit connected across said load and responsive to a preselected voltage to generate a first control signal, said second input connected to a transient voltage detecting circuit, said detecting circuit being connected across said load and responsive to a voltage having a predetermined rise time characteristic to generate a second control signal, whereby said logic circuit means generates a signal for controlling said thyristor in response to the simultaneous occurrence of said first and second signals.

Claim 3

The combination recited in claim 1 wherein said transient voltage detecting circuit comprises a differentiator circuit.

Claim 4

The combination recited in claim 1 wherein said thyristor comprises a triac.

Claim 5

The combination recited in claim 1 wherein said transient voltage detecting circuit is responsive to preselected transient voltages of opposite polarity.

Claim 6

The combination recited in claim 4 wherein said load voltage detector circuit is responsive to preselected load voltages of opposite polarity.

Claim 7

The combination recited in claim 2 wherein said differentiator circuit comprises a first differentiating combination connected across said load and a second differentiating circuit combination coupled to the output of said first differentiating combination, and circuit means coupling the output of said second differentiating combination to said second input.

Claim 8

A circuit for eliminating arcs formed across contacts upon opening and closing thereof comprising means for generating a plurality of control signals upon the occurrence of preselected arc-indicative conditions in said circuit, logic circuit meanS responsive to said control signals for generating a control pulse, and a thyristor connected across said contacts and responsive to said control pulse to substantially short circuit said contacts upon the occurrence of said control pulse, said first mentioned means comprises load voltage detecting means for generating a first control signal upon the occurrence of a preselected voltage across said load, and contact voltage detecting means for generating a second control signal upon the occurrence of a preselected voltage across said contacts, said first mentioned means further comprises a tuned circuit detecting means for generating a third control signal upon the occurrence of a transient high frequency voltage burst across said load, and said logic circuit means generates said control pulse upon the simultaneous occurrence of said first, second and third control signals.

Claim 9

A circuit for eliminating arcs formed across contacts upon opening and closing thereof comprising means for generating a plurality of control signals upon the occurrence of preselected arc-indicative conditions in said circuit, logic circuit meanS responsive to said control signals for generating a control pulse, and a thyristor connected across said contacts and responsive to said control pulse to substantially short circuit said contacts upon the occurrence of said control pulse, said first mentioned means comprises load voltage detecting means for generating a first control signal upon the occurrence of a preselected voltage across said load, and contact voltage detecting means for generating a second control signal upon the occurrence of a preselected voltage across said contacts, said first mentioned means further comprises a tuned circuit detecting means for generating a third control signal upon the occurrence of a transient high frequency voltage burst across said load, and said logic circuit means generates said control pulse upon the simultaneous occurrence of said first, second and third control signals.

Claim 10

A circuit for eliminating arcs formed across contacts upon opening and closing thereof comprising means for generating a plurality of control signals upon the occurrence of preselected arc-indicative conditions in said circuit, logic circuit means responsive to said control signals for generating a control pulse, and a thyristor connected across said contacts and responsive to said control pulse to substantially short circuit said contacts upon the occurrence of said control pulse, said first mentioned means includes a transient voltage detecting circuit for generating a first control signal upon the occurrence of a transient voltage across said load having predetermined rise time characteristics and also including load voltage detecting means for generating a second control signal upon the occurrence of a preselected voltage across said load.

Claim 11

A circuit for eliminating arcs formed across contacts upon opening and closing thereof comprising means for generating a plurality of control signals upon the occurrence of preselected arc-indicative conditions in said circuit, logic circuit means responsive to said control signals for generating a control pulse, and a thyristor connected across said contacts and responsive to said control pulse to substantially short circuit said contacts upon the occurrence of said control pulse, said first mentioned means includes a transient voltage detecting circuit for generating a first control signal upon the occurrence of a transient voltage across said load having predetermined rise time characteristics and also including load voltage detecting means for generating a second control signal upon the occurrence of a preselected voltage across said load.

Claim 12

The combination recited in claim 7 wherein said transient voltage detecting means and said load voltage detecting means are responsive to preselected voltages of either polarity.