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US3781653A Expired / Lapsed US ⏱️ 0.0 years remaining

Stabilized direct-current converter responsive to off-period current

Assignee: Italtel SpA
•
Filing: 1972-03-16
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Granted: 1973-12-25
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Expires: 1992-03-16
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Abstract

Abstract A stabilized d-c output is derived from a d-c input voltage through a stepdown circuit including a chopping transistor which is periodically blocked and unblocked by a pulse train from a trigger stage and, when conducting, charges a storage capacitor through a series inductance; with the chopping transistor cut off, the inductance continues the charging of the capacitor through a diode in series with a current sensor. The latter, together with a voltage sensor connected across the capacitor, controls the width of the pulses from the trigger stage to hold the voltage or current level substantially constant. An ancillary transistor is turned on by the trigger pulses to apply to the chopping transistor a reverse bias accelerating the sweep-out of its minority carriers.

Inventors

  • 👤 R Marini

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 05:00
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/10; H02M3/145; H02M3/155; H02M3/156

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 230 words
A stabilized direct-current converter comprising: a pair of input terminals connected across a source of direct current; a pair of output terminals connected to said input terminals for energization thereby; switch means serially connected between said input and output terminals; control means for periodically opening and closing said switch means, thereby generating an intermittent current flow between said input and output terminals; a reactive network between said switch means and said output terminals for smoothing said current flow, said metwork including a rectifying branch carrying an off-period current in the open state of said switch means; current-sensing means in said branch connected to said control means for varying the periods of closure of said switch means in response to the magnitude of said off-period current to maintain the current flow smoothed by said network substantially at a predetermined value, said current-sensing means including a resistance in said branch, a threshold stage connected across said resistance and integrating circuitry energizable by said threshold means in response to a voltage drop across said resistance exceeding a predetermined minimum, said integrating circuitry generating an input signal for said control means, said threshold stage including a monitoring transistor with an emitter-base circuit connected across said resistance; and a biasing circuit extending from said output terminals to said emitter/base circuit for modifying the operation of said monitoring transistor in response to variations in output voltage.
Claim 2
Dependent Claim 230 words
A stabilized direct-current converter comprising: a pair of input terminals connected across a source of direct current; a pair of output terminals connected to said input terminals for energization thereby; switch means serially connected between said input and output terminals; control means for periodically opening and closing said switch means, thereby generating an intermittent current flow between said input and output terminals; a reactive network between said switch means and said output terminals for smoothing said current flow, said metwork including a rectifying branch carrying an off-period current in the open state of said switch means; current-sensing means in said branch connected to said control means for varying the periods of closure of said switch means in response to the magnitude of said off-period current to maintain the current flow smoothed by said network substantially at a predetermined value, said current-sensing means including a resistance in said branch, a threshold stage connected across said resistance and integrating circuitry energizable by said threshold means in response to a voltage drop across said resistance exceeding a predetermined minimum, said integrating circuitry generating an input signal for said control means, said threshold stage including a monitoring transistor with an emitter-base circuit connected across said resistance; and a biasing circuit extending from said output terminals to said emitter/base circuit for modifying the operation of said monitoring transistor in response to variations in output voltage.
Claim 3
Dependent Claim 36 words
A current converter as defined in claim 1, further comprising voltage-sensing means connected across said output terminals and coupled to said control means for delivering thereto another input signal for maintaining a substantially constant output voltage.
Claim 4
Dependent Claim 27 words
A current converter as defined in claim 2 wherein said current-sensing means and said voltage-sensing means are connected to said control means through a pair of diodes.
Claim 5
Dependent Claim 35 words
A current converter as defined in claim 1 wherein said switch means comprises a chopping transistor with a base and an emitter, said control means including a generator of trigger pulses connected to said base.
Claim 6
Dependent Claim 70 words
A current converter as defined in claim 4 wherein said chopping transistor is provided with biasing means connected across said base and emitter for blocking conduction in the absence of said trigger pulses, said biasing means including an ancillary transistor provided with a supplemental energizing circuit and connected to apply a reverse bias to the base of said chopping transistor in the absence of a trigger pulse from said generator.
Claim 7
Dependent Claim 30 words
A current converter as defined in claim 5 wherein said reactive network includes a series inductance, said supplemental energizing circuit including a feedback coil electromagnetically coupled to said series inductance.
Claim 8
Dependent Claim 52 words
A current converter as defined in claim 5 wherein said biasing means includes a further transistor in cascade with said chopping transistor and in tandem with said ancillary transistor, said generator being connected to said further transistor for transmitting said trigger pulses through the latter to the base of said chopping transistor.
Claim 9
Dependent Claim 265 words
A stabilized direct-current converter comprising: a pair of input terminals connected across a source of direct current; a pair of output terminals connected to said input terminals for energization thereby; switch means serially connected between said input and output terminals, said switch means including a chopping transistor with a base and an emitter; control means for periodically opening and closing said switch means, thereby generating an intermittent current flow between said input and output terminals, said control means including a generator of trigger pulses connected to said base; a reactive network between said switch means and said output terminals for smoothing said current flow, said network including a rectifying branch carrying an off-period current in the open state of said switch means; current-sensing means in said branch connected to said control means for varying the periods of closure of said switch means in response to the magnitude of said off-period current to maintain the current flow smoothed by said network substantially at a predetermined value; and biasing means connected across said base and emitter for blocking conduction of said chopping transistor in the absence of said trigger pulses; said biasing means including an ancillary transistor provided with a supplemental energizing circuit and connected to apply a reverse bias to the base of said chopping transistor in the absence of a trigger pulse from said generator, and a further transistor in cascade with said chopping transistor and in tandem with said ancillary transistor, said generator being connected to said further transistor for transmitting said trigger pulses through the latter to the base of said chopping transistor.
Claim 10
Dependent Claim 265 words
A stabilized direct-current converter comprising: a pair of input terminals connected across a source of direct current; a pair of output terminals connected to said input terminals for energization thereby; switch means serially connected between said input and output terminals, said switch means including a chopping transistor with a base and an emitter; control means for periodically opening and closing said switch means, thereby generating an intermittent current flow between said input and output terminals, said control means including a generator of trigger pulses connected to said base; a reactive network between said switch means and said output terminals for smoothing said current flow, said network including a rectifying branch carrying an off-period current in the open state of said switch means; current-sensing means in said branch connected to said control means for varying the periods of closure of said switch means in response to the magnitude of said off-period current to maintain the current flow smoothed by said network substantially at a predetermined value; and biasing means connected across said base and emitter for blocking conduction of said chopping transistor in the absence of said trigger pulses; said biasing means including an ancillary transistor provided with a supplemental energizing circuit and connected to apply a reverse bias to the base of said chopping transistor in the absence of a trigger pulse from said generator, and a further transistor in cascade with said chopping transistor and in tandem with said ancillary transistor, said generator being connected to said further transistor for transmitting said trigger pulses through the latter to the base of said chopping transistor.
Claim 11
Dependent Claim 49 words
A current converter as defined in claim 8 wherein the conductor type of said further transistor is the same as that of said chopping transistor but opposite that of said ancillary transistor, said further transistor and ancillary transistor having interconnected emitters joined to the base of said chopping transistor.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-12-24 1977-06-25 1977-12-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-12-24 1981-06-25 1981-12-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-12-24 1985-06-25 1985-12-25 $7700.00 Window Closed / Lapsed

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