US3780426A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming a semiconductor circuit element in an isolated epitaxial layer
Assignee: Individual
•
Filing: 1970-10-12
•
Granted: 1973-12-25
•
Expires: 1990-10-12
Abstract
Abstract Method for isolation comprising the steps of forming layers with a high impurity concentration along one surface of a semiconductor substrate growing a semiconductor epitaxial layer on one surface of the semiconductor substrate, said epitaxial layer having a conductivity type opposite to that of said high impurity concentration layer, forming at least one groove in said epitaxial layer in such a manner that the groove divides the said epitaxial layer into a plurality of regions, diffusing an impurity with opposite conductivity type to the epitaxial layer from all surfaces of the groove into the epitaxial layer and depositing a metal or an insulating layer in the groove.
Inventors
- 👤 Y Ono
- 👤 K Naraoka
- 👤 H Saida
- 👤 M Nomura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 03:32
CPC Classifications
H; H10; H10P; H10P95/00; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30; H10W20/00; H10W20/40; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/051; Y10S148/085
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
30 words
A method according to claim 1, wherein the depth of the groove formed in the epitaxial layer is shallow compared to that of the epitaxial layer from the surface thereof.
Claim 2
Dependent Claim
258 words
In method of making a semiconductor circuit element in an isolated semiconductor epitaxial layer, the method including the steps of: a. diffusing selectively an impurity of a first conductivity type through a predetermined portion of the surface of a semiconductor substrate so as to form a high impurity concentration layer of the first conductivity type in a desired pattern along the surface thereof; b. forming an epitaxial layer of a second conductivity type opposite to the first conductivity type on the surface of the semiconductor substrate, said epitaxial layer being of a desired thickness and covering the high impurity concentration layer; c. etching away the epitaxial layer above the peripheral portion of the high impurity concentration layer so as to form a groove of a desired pattern so that the depth of the groove is shallow against that of said epitaxial layer from the surface thereof and the groove divides the epitaxial layer above said high impurity concentration layer from another epitaxial layer in the surface of the epitaxial layer; d. diffusing an impurity of said first conductivity type through the surface of the groove in such a manner that an impurity diffusion layer of the first conductivity type formed into said surface of the groove is overlapped by a conversion region of conductivity type which is formed by solid phase diffusion of the impurity in said high impurity concentration layer into the epitaxial layer through interface between the epitaxial layer and the high impurity concentration layer during diffusing of the impurity into the surface of the groove.
Claim 3
Dependent Claim
46 words
A method according to claim 3, wherein the impurity of the first conductivity type diffused through all the surfaces of the groove is simultaneously diffused through the predetermined surface of the isolated epitaxial layer so as to form a region of the first conductivity type therein.
Claim 4
Dependent Claim
152 words
In a method of making a semiconductor circuit element in an isolated semiconductor epitaxial layer, the method including: a. forming a high impurity concentration layer of a first conductivity type along one surface of a semiconductor substrate; b. forming a semiconductor epitaxial layer of a second conductivity type opposite to the first conductivity type on one surface of the semiconductor substrate; c. etching away at least one predetermined portion of said semiconductor epitaxial layer to form at least one groove therein, said groove reaching said semiconductor substrate of the first conductivity type and dividing said semiconductor epitaxial layer of the second conductivity type into a plurality of regions in the surface thereof; d. diffusing an impurity of the first conductivity type through the surfaces of the groove; and e. filling a metal within the groove until the surface of the filled metal layer becomes flush with the surface of the epitaxial layer.
Claim 5
Dependent Claim
38 words
A method according to claim 5, wherein before the step of filling a metal within the groove, the surfaces of the groove are coated with a thin metal layer capable of forming ohmic connection with the epitaxial layer.
Claim 6
Dependent Claim
47 words
A method according to claim 5, wherein when the impurity of the second conductivity type diffused through the all surfaces of the groove is simultaneously diffused through the predetermined surface of the isolated epitaxial layer so as to form a region of the second conductivity type therein.
Claim 7
Dependent Claim
186 words
In a method of making a semiconductor circuit element in an isolated semiconductor epitaxial layer, the method including the steps of: a. forming a high impurity concentration layer of a first conducTivity type in a predetermined surface of a semiconductor substrate; b. forming a semiconductor epitaxial layer of a second conductivity type opposite to the first conductivity type on one surface of the semiconductor substrate; c. etching away at least one predetermined closed loop portion of the semiconductor epitaxial layer to form at least one groove therein, said groove extending from the surface of the epitaxial layer at least into the epitaxial layer above the high impurity concentration layer and dividing the semiconductor epitaxial layer of the second conductivity type into a plurality of regions in the surface thereof; d. diffusing an impurity of the first conductivity type from the surfaces of the groove into the semiconductor epitaxial layer until a layer formed along the surfaces of the groove by the impurity diffusion is at least electrically connected with the high impurity concentration layer; and, e. depositing a metal layer on the surfaces of said groove.
Claim 8
Dependent Claim
102 words
A method of making a semiconductor circuit element in an isolated semiconductor epitaxial layer in accordance with claim 8, wherein the step of diffusing an impurity of the first conductivity type from the surfaces of the groove into the semiconductor epitaxial layer comprises diffusion of the impurity into the semiconductor epitaxial layer until a layer formed along the surfaces of the groove by the impurity diffusion is overlapped by a conversion region of a conductivity type in the epitaxial layer, said conversion region being formed by solid phase diffusion of the impurity in the high impurity concentration layer into the epitaxial layer.
Claim 9
Independent Claim
273 words
A method of making a semiconductor transistor circuit element in an isolated semiconductor epitaxial layer comprising the steps of: a. providing a collector and isolation region by forming a high impurity concentration layer of a first conductivity type in a predetermined surface of a semiconductor substrate; b. forming a semiconductor epitaxial layer of a second conductivity type opposite said first conductivity type on one surface of said semiconductor substrate; c. etching away at least one predetermined loop portion of said semiconductor epitaxial layer to form at least one groove therein, said groove extending from the surface of said epitaxial layer at least into the epitaxial layer above the high impurity concentration layer and dividing said epitaxial layer into a plurality of regions in the surface thereof; d. simultaneously defining the extent of the base and collector regions of said transistor and forming the emitter thereof while isolating said base region by simultaneously diffusing an impurity of the first conductivity type from the surface of the groove and from a predetermined surface portion of said epitaxial layer surrounded by said groove into the semiconductor epitaxial layer until a layer formed along the surfaces of said groove by the high impurity diffusion is at least electrically connected with the high impurity concentration layer so as to constitute the collector and isolation regions of said transistor surrounding the base region thereof, into which the emitter region extends from the surface of said epitaxial layer above said high impurity concentration layer, while being spaced therefrom by the base region portion of said epitaxial layer; and e. providing metal contacts on said groove, said base and emitter regions,
Claim 10
Dependent Claim
38 words
A method according to claim 7, wherein before the step of filling a metal within the groove, the surfaces of the groove are coated with a thin metal layer capable of forming ohmic connection with the epitaxial layer.
Claim 11
Dependent Claim
97 words
A method according to claim 5, wherein an inversion layer of said first conductivity type is out diffused from said high impurity concentration layer into said epitaxial layer during the diffusion of said impurity in step (d) and further including the steps of: f. forming a diffused region of said second conductivity type into the surfacE portion of said epitaxial layer bounded by said grooves to a depth to contact said inversion layer; and g. forming an additional diffused regions of said first conductivity type into a surface portion of the diffused region formed in step (f).
Claim 12
Dependent Claim
38 words
A method according to claim 12, wherein before the step of filling a metal within the groove, the surfaces of the groove are coated with a thin metal layer capable of forming ohmic connection with the epitaxial layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-12-24 | 1977-06-25 | 1977-12-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-12-24 | 1981-06-25 | 1981-12-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-12-24 | 1985-06-25 | 1985-12-25 | $7700.00 | Window Closed / Lapsed |