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US3780320A Expired / Lapsed US ⏱️ 0.0 years remaining

Schottky barrier diode read-only memory

Assignee: International Business Machines Corp
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Filing: 1971-12-20
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Granted: 1973-12-18
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Expires: 1991-12-20
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Abstract

Abstract A monolithic Schottky barrier diode read-only memory comprising a semiconductor substrate having more than one separate and distinctly functional integrated circuit means located thereon. A plurality of Schottky barrier diodes comprising a more than one metal system contact the semi-conductor substrate for forming a plurality of Schottky barrier diode junctions. A separate Schottky barrier diode comprising a corresponding more than one metal system is incorporated into the other separate and distinctly functional integrated circuit means for addressing the Schottky barrier diode and sensing information therefrom. Interconnection metallurgy corresponding to the more than one metal system connects the plurality of separate and distinctly functional integrated circuit means and forms a continuous electrical path with the more than one metal system forming the Schottky barrier diodes.

Inventors

  • 👤 J Dorler
  • 👤 J Forneris
  • 👤 D Swietek

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 12:51
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/06; G11C17/08; H; H10; H10B; H10B20/00; H10D; H10D99/00; H10P; H10P95/00; Y; Y10; Y10S; Y10S257/00; Y10S257/926

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 240 words
A monolithic structure circuit array comprising: a. a semiconductor substrate, b. more than one separate and distinctly functional integrated circuit means located on said semiconductor substrate, c. a first one of said more than one separate and distinctly functional integrated circuit means comprising a plurality of Schottky barrier diodes located on said semiconductor substrate, d. each of said plurality of Schottky barrier diodes comprising a more than one metal system contacting said semiconductor substrate for forming Schottky barrier diode junctions, e. an interconnection metallurgy disposed on said substrate, at least a portion of said interconnection metallurgy adapted for interconnecting said plurality of Schottky barrier diodes, f. said interconnection metallurgy comprising a metallurgical system comprising said more than one metal system, g. said more than one metal system contacting said semiconductor substrates for forming Schottky barrier diode junctions and said interconnection metallurgy constituting a continuous electrical path, h. said plurality of Schottky barrier diodes constituting a read-only memory, i. each of said other more than one separate and distinctly functional integrated circuit means each comprising at least a single Schottky barrier diode, j. each of said at least one single Schottky barrier diode comprising a more than one metal system contacting said semiconductor substrate for forming a Schottky barrier diode junction, and k. at least another portion of said interconnection metallurgy being adapted for connecting said other more than one separate and distinctly functional integrated circuit means to said read-only memory.
Claim 2
Dependent Claim 240 words
A monolithic structure circuit array comprising: a. a semiconductor substrate, b. more than one separate and distinctly functional integrated circuit means located on said semiconductor substrate, c. a first one of said more than one separate and distinctly functional integrated circuit means comprising a plurality of Schottky barrier diodes located on said semiconductor substrate, d. each of said plurality of Schottky barrier diodes comprising a more than one metal system contacting said semiconductor substrate for forming Schottky barrier diode junctions, e. an interconnection metallurgy disposed on said substrate, at least a portion of said interconnection metallurgy adapted for interconnecting said plurality of Schottky barrier diodes, f. said interconnection metallurgy comprising a metallurgical system comprising said more than one metal system, g. said more than one metal system contacting said semiconductor substrates for forming Schottky barrier diode junctions and said interconnection metallurgy constituting a continuous electrical path, h. said plurality of Schottky barrier diodes constituting a read-only memory, i. each of said other more than one separate and distinctly functional integrated circuit means each comprising at least a single Schottky barrier diode, j. each of said at least one single Schottky barrier diode comprising a more than one metal system contacting said semiconductor substrate for forming a Schottky barrier diode junction, and k. at least another portion of said interconnection metallurgy being adapted for connecting said other more than one separate and distinctly functional integrated circuit means to said read-only memory.
Claim 3
Dependent Claim 44 words
A monolithic structure as in claim 1 wherein said other more than one separate and distinctly functional integrated circuit means comprise: a. first logic circuit means for addressing said read-only memory, and second logic means for sensing the binary state of said read-only memory.
Claim 4
Dependent Claim 28 words
A monolithic structure as in claim 2 wherein: a. said at least a single Schottky barrier diode is connected to an active device for clamping the active device.
Claim 5
Dependent Claim 28 words
A monolithic structure as in claim 3 wherein: a. said at least a single Schottky barrier diode is connected to an active device for providing a voltage translation.
Claim 6
Dependent Claim 27 words
A monolithic structure as in claim 4 wherein: a. said at least a single Schottky barrier diode is connected to an active device for decoding binary signals.
Claim 7
Dependent Claim 19 words
A monolithic structure as in claim 5 wherein: a. said more than one metal system comprises aluminum and copper.
Claim 8
Dependent Claim 26 words
A monolithic structure as in claim 6 further including: a. a passivation layer interdisposed between said interconnection metallurgy and the upper surface of said semiconductor substrate.

References Cited (Backward Citations)

US3585412A Cited
US3631305A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-12-17 1977-06-18 1977-12-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-12-17 1981-06-18 1981-12-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-12-17 1985-06-18 1985-12-18 $7700.00 Window Closed / Lapsed

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