Mos-bipolar high voltage driver circuit

Claim 2

A circuit comprising a plurality of bipolar transistors and a plurality of MOS transistors, said bipolar transistors and said MOS transistors being formed in a common substrate with a common strip-like doped region forming the drain junctions and associated drain terminals of said MOS transistors with said drain terminals being connected in common with each other by portions of said strip-like region, and portions of said common substrate forming the base regions of said plurality of bipolar transistors with the base terminals of said bipolar transistors being connected in common with each other by portions of said substrate, and electrically conductive patterns interconnecting said MOS and said bipolar transistors to form a display driver circuit.

Claim 3

The circuit according to claim 1 and further including a display readout means responsive to said bipolar transistors.

Claim 4

A display circuit comprising a semiconductor body having a first substrate region of one conductivity type and a second substrate region of opposite conductivity type, a plurality of MOS transistors in said first substrate region, and a plurality of bipolar transistors in said second substrate region, said plurality of MOS transistors including a low resistivity strip-like region of said opposite conductivity type forming the drain regions and a common interconnection therebetween, said plurality of bipolar transistors including base regions comprised of portions of said second substrate region, and a pattern of conductive leads selectively interconnecting said MOS and said bipolar transistors.

Claim 5

A display circuit comprising a semiconductor body having a first substrate region of one conductivity type and a second substrate region of opposite conductivity type, a plurality of MOS transistors in said first substrate region, and a plurality of bipolar transistors in said second substrate region, said plurality of MOS transistors including a low resistivity strip-like region of said opposite conductivity type forming the drain regions and a common interconnection therebetween, said plurality of bipolar transistors including base regions comprised of portions of said second substrate region, and a pattern of conductive leads selectively interconnecting said MOS and said bipolar transistors.

Claim 6

The circuit according to claim 3 and further including a display readout means responsive to said bipolar transistors.

Claim 7

A display driver circuit comprising a semiconductor substrate having first and second contiguous regions of opposite conductivity type with portions of each of said regions extending to at least one surface of said substrate, said first region having formed therein a plurality of MOS transistors with the drain junction being formed and the drain of each of said MOS transistors being interconnected to each other by a third region of low resistivity semiconductor material, said third region of semiconductor material having a conductivity type opposite the conductivity type of said first region, said second region of said substrate having formed therein a plurality of non-contiguous regions having a conductivity type opposite of said second region with selected members of said non-contiguous regions in conjunction with selected portions of said second region forming a plurality of bipolar transistors with the base terminals of said plurality of bipolar transistors being connected in common by said second region of said substrate, said plurality of MOS transistors and said plurality of bipolar transistors being interconnected to each other to form a display driver by a patterned electrically conductive layer selectively formed on and selectively insulated from the surface of said substrate.

Claim 8

A display driver circuit comprising a semiconductor substrate having first and second contiguous regions of opposite conductivity type with portions of each of said regions extending to at least one surface of said substrate, said first region having formed therein a plurality of MOS transistors with the drain junction being formed and the drain of each of said MOS transistors being interconnected to each other by a third region of low resistivity semiconductor material, said third region of semiconductor material having a conductivity type opposite the conductivity type of said first region, said second region of said substrate having formed therein a plurality of non-contiguous regions having a conductivity type opposite of said second region with selected members of said non-contiguous regions in conjunction with selected portions of said second region forming a plurality of bipolar transistors with the base terminals of said plurality of bipolar transistors being connected in common by said second region of said substrate, said plurality of MOS transistors and said plurality of bipolar transistors being interconnected to each other to form a display driver by a patterned electrically conductive layer selectively formed on and selectively insulated from the surface of said substrate.

Claim 9

An integrated circuit for driving display devices, comprising in combination: a. a semiconductor substrate having a first region having P conductivity type which extends to the top and bottom surfaces of said substrate and a second region having N conductivity type which extends to at least one surface of said substrate; b. an elongated strip-like region of semiconductor material having P+ conductivity type extending to the surface of said substrate and within said second region having N conductivity type; c. a plurality of substantiallY rectangular regions of semiconductor material having P+ conductivity type and disposed adjacent said strip-like region and extending to the surface of said substrate; d. a plurality of regions of semiconductor material within said region of P conductivity type, said plurality of regions having N+ conductivity type and extending to one surface of said substrate; e. a thin insulating layer selectively covering the surface of said substrate; f. a pattern of electrically conductive leads covering said insulating layers and said substrate; wherein g. said strip-like regions of semiconductor material having P+ conductivity type in conjunction with said substantially rectangular regions of semiconductor material having P+ conductivity type and portions of said insulating layer and portions of said conductive pattern form a plurality of MOS transistors with the source terminals of said MOS transistors connected in common; and wherein h. said regions of N+ conductivity type in conjunction with portions of said insulating layer and portions of said conductive pattern form a group of bipolar transistors with the base terminal of each of said bipolar transistors being connected in common through said P conductivity type region; and wherein i. said MOS transistors and said bipolar transistors are interconnected by portions of said conductive patterns to form a display drive circuit.

Claim 10

An integrated circuit for driving display devices, comprising in combination: a. a semiconductor substrate having a first region having P conductivity type which extends to the top and bottom surfaces of said substrate and a second region having N conductivity type which extends to at least one surface of said substrate; b. an elongated strip-like region of semiconductor material having P+ conductivity type extending to the surface of said substrate and within said second region having N conductivity type; c. a plurality of substantiallY rectangular regions of semiconductor material having P+ conductivity type and disposed adjacent said strip-like region and extending to the surface of said substrate; d. a plurality of regions of semiconductor material within said region of P conductivity type, said plurality of regions having N+ conductivity type and extending to one surface of said substrate; e. a thin insulating layer selectively covering the surface of said substrate; f. a pattern of electrically conductive leads covering said insulating layers and said substrate; wherein g. said strip-like regions of semiconductor material having P+ conductivity type in conjunction with said substantially rectangular regions of semiconductor material having P+ conductivity type and portions of said insulating layer and portions of said conductive pattern form a plurality of MOS transistors with the source terminals of said MOS transistors connected in common; and wherein h. said regions of N+ conductivity type in conjunction with portions of said insulating layer and portions of said conductive pattern form a group of bipolar transistors with the base terminal of each of said bipolar transistors being connected in common through said P conductivity type region; and wherein i. said MOS transistors and said bipolar transistors are interconnected by portions of said conductive patterns to form a display drive circuit.

Claim 11

An integrated circuit for driving display devices, comprising in combination: a. a semiconductor substrate having a first region having N conductivity type which extends to the top and bottom surfaces of said substrate and a second region having P conductivity type which extends to at least one surface of said substrate; b. an elongated strip-like region of semiconductor material having N+ conductivity type extending to the surface of said substrate and within said second region having P conductivity type; c. a plurality of substantially rectangular regions of semiconductor material having N+ conductivity type and disposed adjacent said strip-like region and extending to the surface of said substrate; d. a plurality of regions of semiconductor material within said region of N conductivity type, said plurality of regions having P+ conductivity type and extending to one surface of said substrate; e. a thin insulating layer selectively covering the surface of said substrate; f. a pattern of electrically conductive leads covering said insulating layers and said substrate; wherein g. said strip-like regions of semiconductor material having N+ conductivity type in conjunction with said substantially rectangular regions of semiconductor material having N+ conductivity type and portions of said insulating layer and portions of said conductive pattern form a plurality of MOS transistors with the source terminals of said MOS transistors connected in common; and wherein h. said regions of P+ conductivity type in conjunction with portions of said insulating layer and portions of said conductive pattern form a group of bipolar transistors with the base terminal of each of said bipolar transistors being connected in common through said P conductivity type region; and wherein i. said MOS transistors and said bipolar transistors are interconnected by portions of said conductive patterns to form a display drive circuit.

Claim 12

An integrated circuit for driving display devices, comprising in combination: a. a semiconductor substrate having a first region having N conductivity type which extends to the top and bottom surfaces of said substrate and a second region having P conductivity type which extends to at least one surface of said substrate; b. an elongated strip-like region of semiconductor material having N+ conductivity type extending to the surface of said substrate and within said second region having P conductivity type; c. a plurality of substantially rectangular regions of semiconductor material having N+ conductivity type and disposed adjacent said strip-like region and extending to the surface of said substrate; d. a plurality of regions of semiconductor material within said region of N conductivity type, said plurality of regions having P+ conductivity type and extending to one surface of said substrate; e. a thin insulating layer selectively covering the surface of said substrate; f. a pattern of electrically conductive leads covering said insulating layers and said substrate; wherein g. said strip-like regions of semiconductor material having N+ conductivity type in conjunction with said substantially rectangular regions of semiconductor material having N+ conductivity type and portions of said insulating layer and portions of said conductive pattern form a plurality of MOS transistors with the source terminals of said MOS transistors connected in common; and wherein h. said regions of P+ conductivity type in conjunction with portions of said insulating layer and portions of said conductive pattern form a group of bipolar transistors with the base terminal of each of said bipolar transistors being connected in common through said P conductivity type region; and wherein i. said MOS transistors and said bipolar transistors are interconnected by portions of said conductive patterns to form a display drive circuit.

Claim 13

A display driver in accordance with claim 5 wherein the drain terminals of said MOS transistors are connected to a duty cycle modulation source.

Claim 14

A driver circuit comprising a semiconductor body having therein a first substrate region of P conductivity type and a second substrate region of N conductivity type, said second substrate region having therein at least two spaced apart regions of P+ conductivity type, with one of said P+ regions provided in an elongated strip-like configuration, said firSt substrate region having therein at least two spaced apart regions of N+ conductivity type circumscribed by a third N+ conductivity type region to thereby provide a guard ring therearound, said semiconductor body having a thin insulating layer with openings therein on at least one surface thereby selectively covering and selectively exposing portions of said region of P+ and N+ conductivity type, and an electrically conductive patterned layer selectively contacting said regions of P+ and N+ conductivity type and overlying portions of P+ and N+ conductivity regions to thereby form a driver circuit.

Claim 15

A driver circuit comprising a semiconductor body having therein a first substrate region of P conductivity type and a second substrate region of N conductivity type, said second substrate region having therein at least two spaced apart regions of P+ conductivity type, with one of said P+ regions provided in an elongated strip-like configuration, said firSt substrate region having therein at least two spaced apart regions of N+ conductivity type circumscribed by a third N+ conductivity type region to thereby provide a guard ring therearound, said semiconductor body having a thin insulating layer with openings therein on at least one surface thereby selectively covering and selectively exposing portions of said region of P+ and N+ conductivity type, and an electrically conductive patterned layer selectively contacting said regions of P+ and N+ conductivity type and overlying portions of P+ and N+ conductivity regions to thereby form a driver circuit.