US3777276A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Phase lock loop with automatic step by step search sweep followed by linear search sweep
Assignee: United States Department of the Navy
•
Filing: 1973-01-24
•
Granted: 1973-12-04
•
Expires: 1993-01-24
Abstract
Abstract Disclosed is a phase-locking oscillator loop circuit in conjunction with automatic circuitry for searching for and forcing a phase locked condition with respect to a reference frequency, in which condition the oscillator of the loop operates at a frequency which is a function of first and second input frequencies. The automatic circuitry is characterized by means for step by step searching from a first coarse frequency approximation, with transition to a linear sweep until the lock frequency is achieved. The step by step search automatically reiterates if the desired frequency is passed.
Inventors
- 👤 I Klein
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 10:11
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/08; H03L7/10; H03L7/12
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
198 words
An oscillator system having the capability to automatically seek phase lock at a desired frequency which is a function of a plurality of input frequencies, said system comprising: an oscillator loop having a characteristic lock capture range and including voltage controlled oscillator means, mixer means for deriving an intermediate frequency signal from a combination of input frequency signals and the output frequency signal of said voltage controlled oscillator means, a source of a reference frequency signal, and comparator means for deriving from a combination of said reference frequency signal and said intermediate frequency signal a feedback voltage signal as an input to said voltage controlled oscillator, which feedback voltage signal causes said loop to tend to maintain lock; and automatic search means, connected to said loop, for initiating step-by-step frequency changes of said voltage controlled oscillator means as long as said intermediate frequency signal falls outside a predetermined frequency range which includes said reference signal, for terminating said step-by-step frequency changes and initiating a linear frequency change of said voltage controlled oscillator whEn said intermediate frequency signal falls both within said first predetermined frequency range and outside a second predetermined frequency range with respect to said frequency signal.
Claim 2
Dependent Claim
198 words
An oscillator system having the capability to automatically seek phase lock at a desired frequency which is a function of a plurality of input frequencies, said system comprising: an oscillator loop having a characteristic lock capture range and including voltage controlled oscillator means, mixer means for deriving an intermediate frequency signal from a combination of input frequency signals and the output frequency signal of said voltage controlled oscillator means, a source of a reference frequency signal, and comparator means for deriving from a combination of said reference frequency signal and said intermediate frequency signal a feedback voltage signal as an input to said voltage controlled oscillator, which feedback voltage signal causes said loop to tend to maintain lock; and automatic search means, connected to said loop, for initiating step-by-step frequency changes of said voltage controlled oscillator means as long as said intermediate frequency signal falls outside a predetermined frequency range which includes said reference signal, for terminating said step-by-step frequency changes and initiating a linear frequency change of said voltage controlled oscillator whEn said intermediate frequency signal falls both within said first predetermined frequency range and outside a second predetermined frequency range with respect to said frequency signal.
Claim 3
Dependent Claim
65 words
An oscillator system as defined in claim 1 and wherein said mixer means comprises: a first mixer connected to combine the output frequency signal of said voltage controlled oscillator and a first of said input frequency signals; and a second mixer connected to combine the output signal of said first mixer and a second of said input frequency signals to derive said intermediate frequency signal.
Claim 4
Dependent Claim
45 words
An oscillator system as defined in claim 2 and wherein said loop further comprises: band pass limiting amplifier means, connected between said mixer means and said comparator means, for amplifying said intermediate frequency signal substantially only when it falls in said first predetermined frequency range.
Claim 5
Dependent Claim
103 words
An oscillator system as defined in claim 3, and wherein said automatic search means comprises: stairstep generator means for generating a stairstep voltage signal; ramp generator means for generating a linear ramp voltage signal; and logic means, connected to be responsive to outputs of said limiting amplifier means and of said comparator means, for rendering said stairstep generator operative only when said intermediate frequency signal falls outside said first predetermined frequency range, and for rendering said ramp generator operative only when there is coincidence of said intermediate frequency signal falling within said first predetermined range and falling outside said second predetermined frequency range.
Claim 6
Dependent Claim
51 words
An oscillator system as defined in claim 4, and wherein said automatic search means further comprises: summing amplifier means responsive to said linear ramp voltage signal, to said stairstep voltage signal, and to a coarse programming voltage signal to provide a frequency determining input voltage to said voltage controlled oscillator means.
Claim 7
Dependent Claim
124 words
An oscillator system as defined in claim 5 and wherein said logic means comprises: means connected to the output of said limiting amplifier means, for providing first and second logic output conditions corresponding respectively to whether said intermediate frequency signal is without or within said first predetermined frequency range; means connected to the output of said comparator means, for providing third and fourth logic conditions corresponding respectively to whether or not said feedback voltage signal exceeds a predetermined condition indicative of said intermediate frequency signal being in said second predetermined frequency range; said stairstep generator means being responsive to said first logic condition to initiate generation of said stairstep voltage signal, and responsive to said second logic condition to terminate said stairstep voltage signal.
Claim 8
Dependent Claim
68 words
An oscillator system as defined in claim 6, and wherein: said stairstep generator is characterized as a reiterative generator whereby, as long as said stairstep generator is enabled, said stairstep voltage signal progresses from a predetermined starting voltage level by steps to a predetermined final voltage level and then returns directly to said starting voltage level from which it again progresses by steps toward said final voltage level.
Claim 9
Dependent Claim
408 words
An automatically searching phase locking oscillator loop circuit comprising: voltage controlled oscillator means for providing an oscillator output signal at a frequency which varies with changes in a direct current voltage control signal input thereto; summing means, connected to said voltage controlled oscillator means, for providing said control signal in response to one or more component voltage inputs; input frequency source means for providing first and second input frequency signals; first mixer means, connected to receive said first input frequency signal and said oscillator output signal, for providing a combined frequency signal; second mixer means, connected to receive said second input frequency signal and said combined frequency signal, for providing an intermediate frequency signal; intermediate frequency amplifier means, connected to receive said intermediate frequency signal, for amplifying such portion thereof as falls within a first predetermined frequency range; a source of a reference frequency signal; comparator means, connected to respond to the output of said narrow intermediate frequency amplifier and to said reference frequency signal, for providing an output which varies as said intermediate frequency signal differs from said reference frequency signal; high pass amplifier means, connected to receive said output of said comparator means, for providing first and second logic signal conditions, respectively, as said intermediate frequency signal differs from said reference frequency signal by an amount which falls without or within a second predetermined frequency range; narrow passband amplifier means, connected to receive an output of said intermediate frequency amplifier, to provide third and fourth logic conditions, respectively, as said intermediate frequency falls within or without said first predetermined frequency range; reiterative stairstep generator means, connected to be responsive to said third and fourth logic conditions, for providing a stairstep voltage signal output when said fourth logic condition prevails; coincidence gate means, connected to be responsive to coincidence of said first and third logic conditions, for providing a fifth logic condition upon said coincidence; ramp generator means, connected to be responsive to said fifth logic condition, for generating a linear voltage ramp signal; said summing means, connected to receive as inputs a coarse programming voltage signal, said stairstep voltage signal, and said linear voltage ramp signal, for providing a combined control voltage signal to said voltage controlled oscillator means; and said voltage controlled oscillator means being responsive to said combined control voltage and to the output of said comparator to provide a desired output frequency which is a function of said first and second input frequencies.
Claim 10
Dependent Claim
408 words
An automatically searching phase locking oscillator loop circuit comprising: voltage controlled oscillator means for providing an oscillator output signal at a frequency which varies with changes in a direct current voltage control signal input thereto; summing means, connected to said voltage controlled oscillator means, for providing said control signal in response to one or more component voltage inputs; input frequency source means for providing first and second input frequency signals; first mixer means, connected to receive said first input frequency signal and said oscillator output signal, for providing a combined frequency signal; second mixer means, connected to receive said second input frequency signal and said combined frequency signal, for providing an intermediate frequency signal; intermediate frequency amplifier means, connected to receive said intermediate frequency signal, for amplifying such portion thereof as falls within a first predetermined frequency range; a source of a reference frequency signal; comparator means, connected to respond to the output of said narrow intermediate frequency amplifier and to said reference frequency signal, for providing an output which varies as said intermediate frequency signal differs from said reference frequency signal; high pass amplifier means, connected to receive said output of said comparator means, for providing first and second logic signal conditions, respectively, as said intermediate frequency signal differs from said reference frequency signal by an amount which falls without or within a second predetermined frequency range; narrow passband amplifier means, connected to receive an output of said intermediate frequency amplifier, to provide third and fourth logic conditions, respectively, as said intermediate frequency falls within or without said first predetermined frequency range; reiterative stairstep generator means, connected to be responsive to said third and fourth logic conditions, for providing a stairstep voltage signal output when said fourth logic condition prevails; coincidence gate means, connected to be responsive to coincidence of said first and third logic conditions, for providing a fifth logic condition upon said coincidence; ramp generator means, connected to be responsive to said fifth logic condition, for generating a linear voltage ramp signal; said summing means, connected to receive as inputs a coarse programming voltage signal, said stairstep voltage signal, and said linear voltage ramp signal, for providing a combined control voltage signal to said voltage controlled oscillator means; and said voltage controlled oscillator means being responsive to said combined control voltage and to the output of said comparator to provide a desired output frequency which is a function of said first and second input frequencies.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-12-03 | 1977-06-04 | 1977-12-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-12-03 | 1981-06-04 | 1981-12-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-12-03 | 1985-06-04 | 1985-12-04 | $7700.00 | Window Closed / Lapsed |