US3775844A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating a multiwafer electrical circuit structure
Assignee: Bunker Ramo Corp
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Filing: 1972-04-27
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Granted: 1973-12-04
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Expires: 1992-04-27
Abstract
Abstract A method of fabricating an electrical circuit structure comprised of a plurality of electrically conductive wafers stacked together under pressure to form a parallelpiped structure containing one or more active components (e.g., integrated circuit chips) as well as conductor means providing coaxial interconnections in X, Y and Z-axis directions. A stack is normally comprised of conductive wafers of different types including component wafers, interconnection wafers, and connector wafers. Z-axis interconnections, i.e., through-connections in a wafer, are fabricated directly from the wafer material itself by selective chemical etching of the wafer so as to form spaced electrically insulated solid conductive slugs within the wafer profile extending between the top and bottom wafer surfaces, with each slug being surrounded by dielectric material which supports the slug and electrically isolates it from the remainder of the wafer material. X-Y axis interconnections for electrically connecting the Z-axis slugs in a wafer in a predetermined manner are also fabricated directly from the wafer material by selective chemical etching so as to form X-Y axis conductors which are likewise contained within the wafer profile and surrounded by dielectric material providing support and electrical isolation. Highly reliable wafer-to-wafer electrical interconnections are obtained in a stack by providing malleable conductive contacts between opposing contacting Z-axis slugs in adjacent wafers, and pressure stacking the wafers so that these malleable contacts are deformed. Additional malleable contacts which are likewise deformed by the pressure stacking are also advantageously provided between other opposing portions of adjacent wafer surfaces for providing wafer-to-wafer ground interconnections. The advantages of pressure stacking are further increased by providing a uniform pattern for the Z-axis slugs and the ground interconnections on all of the wafers of a stack so as to obtain uniform distribution.
Inventors
- 👤 H Parks
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 00:20
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W90/00; H10W90/401; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49123; Y10T29/49124; Y10T29/49126
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
182 words
A method of fabricating a conductive wafer containing a plurality of spaced electrically insulated through-connections in a predetermined pattern and useful for incorporation in a stacked multiwafer electrical circuit structure, said method comprising the steps of: providing a conductive wafer, selectively removing material from one surface of said wafer to form a closed path recess in said surface for each throughconnection to be provided, affixing supporting dielectric material in each closed path recess, selectively removing material from the opposite surface of said wafer to form closed path recesses respectively opposite those formed in said one surface and having depths relative thereto so as to form a plura of spaced isolated conductive segments in said wafer extending between surfaces thereof and supported in said wafer and electrically insulated therefrom by said dielectric material, said isolated conductive segments thereby constituting said through-connections, securing a pressure-deformable contact of conductive material more malleable than said conductive wafer on at least one end of each isolated conductive segment, and securing additional pressure-deformable contacts on at least one surface of said wafer at locations between said isolated segments.
Claim 2
Independent Claim
182 words
A method of fabricating a conductive wafer containing a plurality of spaced electrically insulated through-connections in a predetermined pattern and useful for incorporation in a stacked multiwafer electrical circuit structure, said method comprising the steps of: providing a conductive wafer, selectively removing material from one surface of said wafer to form a closed path recess in said surface for each throughconnection to be provided, affixing supporting dielectric material in each closed path recess, selectively removing material from the opposite surface of said wafer to form closed path recesses respectively opposite those formed in said one surface and having depths relative thereto so as to form a plura of spaced isolated conductive segments in said wafer extending between surfaces thereof and supported in said wafer and electrically insulated therefrom by said dielectric material, said isolated conductive segments thereby constituting said through-connections, securing a pressure-deformable contact of conductive material more malleable than said conductive wafer on at least one end of each isolated conductive segment, and securing additional pressure-deformable contacts on at least one surface of said wafer at locations between said isolated segments.
Claim 3
Dependent Claim
39 words
The invention in accordance with claim 1, wherein the steps of selectively removing are accomplished by selective chemical etching, and wherein all of said through-connections are fabricated in said wafer at the same time by said selective chemical etching.
Claim 4
Dependent Claim
25 words
The invention in accordance with claim 1, wherein said through-connections and said additional pressure-deformable contacts are provided in a predetermined uniform pattern on said wafer.
Claim 5
Dependent Claim
36 words
The invention in accordance with claim 1, wherein said method additionally includes providing at least one electrically insulated conductor extending parallel to said wafer and electrically connecting first and second predetermined ones of said through connections.
Claim 6
Dependent Claim
86 words
The invention in accordance with claim 4, wherein said electrically insulated conductor extending parallel to said wafer is formed by selectively removing material from opposite surfaces of said wafer and replacing at least a portion of the removed material with dielectric material so as to form an isolated elongated conductive portion supported within said wafer and electrically insulated therefrom by said dielectric material and extending in a predetermined path parallel to said wafer chosen to electrically connect said first and second predetermined ones of said through-connections.
Claim 7
Dependent Claim
32 words
The invention in accordance with claim 5, wherein the steps of selectively removing employed in forming said through-connections and said conductor extending parallel to said wafer are accomplished by selective chemical etching.
Claim 8
Dependent Claim
235 words
In a method of fabricating a stacked multiwafer electrical circuit structure containing electrical components and coaxial electrical interconneCtions in X, Y and Z-axis directions for interconnecting said components, said Z-axis direction being perpendicular to the stacked wafers while said X and Y-axis directions are parallel thereto, said method comprising the steps of: providing a plurality of conductive wafers, selectively removing material from opposite surfaces of each wafer and replacing at least a portion of the removed material with dielectric material so as to form a plurality of spaced electrically insulated Z-axis through-connections supported in each wafer and electrically insulated therefrom by said dielectric material and located in the same predetermined pattern on each wafer so that the through-connections on adjacent wafers form aligned pairs when the wafers are stacked, said selectively removing also forming X-Y axis conductors in at least one of said wafers such that each X-Y axis conductor is wholly within its respective wafer, mounting a component to at least one of said wafers with the component output leads electrically connected to predetermined ones of the Z-axis through-connections of the wafer, providing pressure-deformable conductive material more malleable than said wafers between the opposed ends of each aligned pair of through-connections for electrical interconnection thereto when the wafersare stacked, and stacking said wafers under pressure to deform said pressure-deformable conductive material and thereby reliably electrically interconnect the respective through-connections of each aligned opposed pair.
Claim 9
Dependent Claim
235 words
In a method of fabricating a stacked multiwafer electrical circuit structure containing electrical components and coaxial electrical interconneCtions in X, Y and Z-axis directions for interconnecting said components, said Z-axis direction being perpendicular to the stacked wafers while said X and Y-axis directions are parallel thereto, said method comprising the steps of: providing a plurality of conductive wafers, selectively removing material from opposite surfaces of each wafer and replacing at least a portion of the removed material with dielectric material so as to form a plurality of spaced electrically insulated Z-axis through-connections supported in each wafer and electrically insulated therefrom by said dielectric material and located in the same predetermined pattern on each wafer so that the through-connections on adjacent wafers form aligned pairs when the wafers are stacked, said selectively removing also forming X-Y axis conductors in at least one of said wafers such that each X-Y axis conductor is wholly within its respective wafer, mounting a component to at least one of said wafers with the component output leads electrically connected to predetermined ones of the Z-axis through-connections of the wafer, providing pressure-deformable conductive material more malleable than said wafers between the opposed ends of each aligned pair of through-connections for electrical interconnection thereto when the wafersare stacked, and stacking said wafers under pressure to deform said pressure-deformable conductive material and thereby reliably electrically interconnect the respective through-connections of each aligned opposed pair.
Claim 10
Dependent Claim
39 words
The invention in accordance with claim 7, wherein additional pressure-deformable conductive material is provided between at least first and second adjacent wafers at locations intermediate the aligned pairs of through-connections which are likewise deformed during stacking of said wafers.
Claim 11
Dependent Claim
28 words
The invention in accordance with claim 8, wherein said pressure-deformable conductive material is provided by affixing the respective through-connections and surface locations of one of the adjacent wafers.
Claim 12
Dependent Claim
65 words
The invention in accordance with claim 10, wherein said X-Y conductor is formed by selectively removing material from opposite surfaces of the wafer and replacing at least a portion of the removed material with dielectric material so as to isolate an elongated conductive portion from said wafer corresponding to said X-Y conductor and supported in said wafer and electrically insulated therefrom by said dielectric material.
Claim 13
Dependent Claim
29 words
The invention in accordance with claim 10, wherein said selectively removing employed in forming said conductor is such that the resulting X-Y conductor is recessed from both wafer surfaces.
Claim 14
Dependent Claim
281 words
In a method of fabricating an electrical circuit structure containing electrical components and shielded electrical interconnections therefor in X, Y and Z-axis direction, said method comprising the steps of: selectively removing material from first and second conductive sheets and replacing at least a portion of the removed material with dielectric material so as to form first and second interconnection wafers each having a plurality of Z-axis through-connections arranged in a predetermined pattern and electrically connected by X-Y axis conductors wholly within the conductive sheet and recessed from both surfaces thereof, selectively removing material from a third conductive sheet and replacing at least a portion of the removed material with dielectric material so as to form a connector wafer having Z-axis through-connections in the same predetermined pattern as provided on said interconnection wafers, securing pressure-deformable conductive contacts more malleable than said wafers onto one of the opposed ends of each pair of aligned through-connections of said connector and interconnection wafers, stacking said interconnection and connector wafers under pressure with said connector wafer disposed between said interconnection wafers and with said through-connections respectively Aligned, the stacking pressure being sufficient to deform said pressure-deformable contacts and thereby provide reliable Z-axis interconnections between the Z-axis through-connections of said first and second interconnection wafers forming a component wafer carrying at least one of said components and having Z-axis through-connections in the same predetermined pattern as provided on said interconnection and connector wafers and electrically connected to said component by X-Y conductors provided therein, and stacking said component wafer along with said connector and interconnection wafers with the component wafer through-connection aligned and electrically connected to respective ones of the through-connections of said connector and interconnection wafers.
Claim 15
Dependent Claim
281 words
In a method of fabricating an electrical circuit structure containing electrical components and shielded electrical interconnections therefor in X, Y and Z-axis direction, said method comprising the steps of: selectively removing material from first and second conductive sheets and replacing at least a portion of the removed material with dielectric material so as to form first and second interconnection wafers each having a plurality of Z-axis through-connections arranged in a predetermined pattern and electrically connected by X-Y axis conductors wholly within the conductive sheet and recessed from both surfaces thereof, selectively removing material from a third conductive sheet and replacing at least a portion of the removed material with dielectric material so as to form a connector wafer having Z-axis through-connections in the same predetermined pattern as provided on said interconnection wafers, securing pressure-deformable conductive contacts more malleable than said wafers onto one of the opposed ends of each pair of aligned through-connections of said connector and interconnection wafers, stacking said interconnection and connector wafers under pressure with said connector wafer disposed between said interconnection wafers and with said through-connections respectively Aligned, the stacking pressure being sufficient to deform said pressure-deformable contacts and thereby provide reliable Z-axis interconnections between the Z-axis through-connections of said first and second interconnection wafers forming a component wafer carrying at least one of said components and having Z-axis through-connections in the same predetermined pattern as provided on said interconnection and connector wafers and electrically connected to said component by X-Y conductors provided therein, and stacking said component wafer along with said connector and interconnection wafers with the component wafer through-connection aligned and electrically connected to respective ones of the through-connections of said connector and interconnection wafers.
Claim 16
Dependent Claim
62 words
The invention in accordance with claim 12, wherein said method also includes securing additional pressure-deformable malleable contacts more malleable than said sheets onto opposite surfaces of saic connector wafer at locations intermediate the connector wafer through-connections which are likewise deformed by the stacking pressure so as to thereby provide reliable interconnection of individual ground connections between said first and second interconnection wafers.
Claim 17
Dependent Claim
38 words
The invention in accordance with claim 13, wherein said predetermined pattern of Z-axis through-connections and said additional pressure-deformable contacts are arranged in a predetermined uniform pattern so as to provide a uniform pressure distribution for the stacked wafers.
Claim 18
Dependent Claim
134 words
The invention in accordance with claim 12, wherein each of said Z-axis through-connections in said connector and interconnection wafers is formed by steps including: selectively removing material from one surface of the sheet to form a closed path recess therein shaped in accordance with the cross-sectional shape desired for the through-connection, affixing supporting dielectric material in said closed path recess, and selectively removing material from the opposite surface of the sheet to form an opposing closed path recess therein having a shape, depth and location relative to the closed path recess formed in said one surface so as to form an isolated conductive sement in the sheet extending between the surfaces thereof and supported in the sheet and electrically insulated therefrom by said dielectric material, the thus isolated conductive segment being the desired through-connection.
Claim 19
Dependent Claim
40 words
The invention in accordance with claim 15, wherein the steps of selectively removing are accomplished by selective chemical etching, and wherein said selective chemical etching is employed to form all of the through-connections in a sheet at the same time.
Claim 20
Dependent Claim
128 words
The invention in accordance with claim 7, wherein each of said Z-axis through-connections is formed by steps including: selectively removing material from one surface of the sheet to form a closed path recess therein shaped in accordance with the cross-sectional shape desired for the through-connection, affixing supporting dielectric material in said closed path recess, and selectively removing material from the opposite surface of the sheet to form an opposing closed path recess therein having a shape, depth and location relative to the closed path recess formed in said one surface so as to form an isolated conductive segment in the sheet extending between the surfaces thereof and supported in the sheet and electrically insulated therefrom by said dielectric material, the thus isolated conductive segment being the desired through-connection.
Claim 21
Dependent Claim
40 words
The invention in accordance with claim 17, wherein the steps of selectively removing are accomplished by selective chemical etching, and wherein said selective chemical etching is employed to form all of the through-connections in a sheet at the same time.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-12-03 | 1977-06-04 | 1977-12-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-12-03 | 1981-06-04 | 1981-12-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-12-03 | 1985-06-04 | 1985-12-04 | $7700.00 | Window Closed / Lapsed |