Field-accessed, single-wall domain apparatus utilizing interacting shift register loops

Claim 2

A field-access single-wall domain apparatus, including: a layer of material in which singLe-wall magnetic domains are movable; and a plurality of periodically repeating domain propagation elements serially arranged adjacent the surface of said layer in first and second looping shift registers, said elements being responsive to a magnetic field reorienting in the plane of said surface for synchronously circulating about said first and second shift registers first and second sequential patterns of domains representing binary information, the bits of said first and second patterns corresponding with one another in accordance with the respective domain positions in said first and second patterns of domains, a first predetermined element in said first shift register including means for sensing the presence of a domain located under that element location and for providing an electrical sensing signal in response thereto, an electrical conduction path connecting to said sensing means, a second predetermined element in said first shift register, a first predetermined element in said second shift register, a first domain propagation channel connecting between said second predetermined element in said first register and said first predetermined element in said second register, said first domain propagation channel including a first predetermined gating element, connected through said electrical conduction path to said sensing means, for controllably gating said second pattern of domains from said first predetermined element in said second loop to said second predetermined element in said first loop in response to said sensing signal, and means in said second predetermined element in said first loop for synchronously interacting corresponding bits of said first and second patterns of domains and replacing each of the interacting bits of said first pattern with a new bit representative of the interaction product.

Claim 3

The apparatus in accordance with claim 1 in which said interacting means includes an Exclusive-OR logic gate, a first input and the output of which are serially connected in said first shift register and a second input of which connects through said first domain propagation channel to said first element in said first domain propagation channel, said Exclusive-OR gate performing Exclusive-OR logic on the corresponding bits of said first and second patterns of domains and replacing each of the interacting bits of said first pattern with the Exclusive-OR product of the interaction.

Claim 4

The apparatus in accordance with claim 2 in which said first shift register comprises (n-1) periodically repeating domain propagation elements, where n is a characterizing factor in an (n, k) BCH error-correcting code; said second shift register comprises n periodically repeating domain propagation elements; and said first predetermined element in said second shift register includes means, having an input and a first output serially connected in said second shift register and a second output connecting through said first domain propagation channel to said second input of said Exclusive-OR gate, for duplicating said second pattern of domains, said second pattern being coupled to said second input of said Exclusive-OR gate and a duplicate of said second pattern being coupled back into said second register.

Claim 5

The apparatus in accordance with claim 3 comprising: a third looping shift register arranged adjacent the surface of said layer and comprising (n-1) periodically repeating domain propagation elements; means, having first and second outputs, for duplicating a pattern of domains representing a k-bit uncoded information word, where k is a characterizing factor of said (n, k) BCH error-correcting code, to form said first pattern of domains and a duplicate third pattern of domains; a first predetermined gating element in said first shift register; a first predetermined gating element in said third shift register; SECOND and third domain propagation channels, respectively connecting between said first and second outputs of said duplicating means and said first predetermined gating elements in said first and third shift registers, for respectively coupling said first and third patterns of domains from said duplicating means to said first and third shift registers; a second predetermined gating element in said first shift register; a second predetermined gating element in said third shift register; a fourth domain propagation channel connecting to said second gating element in said first shift register; a fifth domain propagation channel connecting to said second gating element in said third shift register; means, connecting to said fourth and fifth domain propagation channels, for combining said pattern of domains in said first shift register with said third pattern of domains to form an n-bit BCH code word after the pattern of domains of said first shift register has been circulated through and interacted in said Exclusive-OR gate k times.

Claim 6

An apparatus in accordance with claim 4 in which said means for combining said first and third patterns of domains comprises fourth and fifth looping shift registers each of which is comprised of (k-1) periodically repeating domain propagation elements serially arranged adjacent the surface of said layer.

Claim 7

An apparatus in accordance with claim 5 in which each of said fourth and fifth shift registers comprises elements which include means, serially connected within the shift register, for sensing and means for annihilating a different domain each time a pattern is circulated in the shift register.

Claim 8

A binary division circuit in accordance with claim 2 comprising a third predetermined element in said first shift register which includes means for duplicating different selected bits of the pattern of domains then circulating in said first shift register, a domain storage register, a second domain propagation channel connecting between said duplicating means and said storage register, means in said second channel for controllably gating the duplicated bits into said register in response to said sensing signal, the resulting pattern of such bits representing the quotient of a binary number represented by said first pattern divided by a binary number represented by said second pattern after said first pattern has propagated through said Exclusive-OR gate a number of times equal to the number of bits in said first pattern.

Claim 9

A binary division circuit in accordance with claim 7 in which said storage register comprises n periodically repeating domain propagation elements serially arranged in a looping geometry adjacent the surface of said layer; said storage register includes a first predetermined gating element; said duplicating means comprises a domain duplicating circuit having an input and first and second outputs, said input and said first output being serially connected in said first shift register; said second domain propagation channel connects between said second output of said duplicating circuit and said first gating element in said storage register, said gating means in said second channel including a gating element for gating to said storage register a duplicate of a different selected bit of the pattern then circulating in said first shift register each time such pattern is circulated in said first shift register.

Claim 10

A binary division circuit in accordance with claim 2, comprising: a third looping shift register serially arranged adjacent the surface of said layer, said shift register comprising n periodically repeating domain propagation elements, where n is a positive integral number; a first predetermined gating element in said first shift register; a first predetermined gating element in said second shift register; means for loading into said first shift register at its first predetermined gating element a pattern of domains initially representating a k-bit dividend, where k is a positive integral number less than n; means for loading into said section shift register at its first predetermined gating element a pattern of domains representing a (k/2+1)-bit divisor; and means, serially connected in said first shift register, for duplicating a different selected bit of the pattern of domains circulating in said first shift register, during each circulation cycle and for coupling a pattern of domains representing the duplicates of the selected bits to said third shift register, whereby a pattern of domains representing the binary quotient of said dividend divided by said divisor accumulates in said third shift register and a pattern of domains representing the binary remainder of such division process accumulates in said first shift register.

Claim 11

A binary division circuit in accordance with claim 9 in which said duplicating and coupling means includes a domain duplicator having an input and first and second outputs, the input and the first output of which are serially connected in said first shift register; second, third and fourth domain propagation channels; a first predetermined gating element in said third shift register; a domain annihilator; a second channel gating element having an input and first and second outputs, the input of said second gating element connecting through said second domain propagation path to the second output of said domain duplicator, the first output of said second gating element connecting through said third domain propagation channel to said first gating element in said third shift register, and the second output of said second gating element connecting through said fourth domain propagation channel to said annihilator, said second gating element being responsive to said sensing signal for normally gating bits from said second output of said duplicator to said annihilator and gating only selected bits from said second output of said duplicator into said third shift register.

Claim 12

A magnetic domain apparatus, including: a layer of material in which single-wall magnetic domains are movable; a first plurality of periodically repeating domain propagation elements arranged adjacent the surface of said layer in a looping shift register in the plane of said surface, for synchronously circulating thereabout a first pattern of domains representing binary information in response to a magnetic field reorienting a predetermined amount in the plane of said surface; a plurality of domain duplicators arranged adjacent the surface of said layer; a second plurality of periodically repeating domain propagation elements arranged adjacent the surface of said layer in a network of domain propagation channels which connect between individual ones of said plurality of duplicators at predetermined nodal locations in said network, the path lengths of said channels being selected to delay domains propagating therealong by different predetermined amounts so that a predetermined time-sequenced pattern of differently delayed domains arrives at a common element location defining the output of said network in response to a domain being propagated to an element location defining the input of said network; a first domain propagation channel connecting to the output of said network; means, having a first input and an output serially connected in said shift register and a second input connected through said first domain propagation channel to said output of said network, for performing Exclusive-OR logic between said first pattern of domains and said time-sequenced pattern of domains; and means, connected between a predetermined element location in said shift register and said input of said network, for sensing the presence of a selected domain at a predetermined element location in said shift register and gating a domain into said input of said network in response thereto, whereby the Exclusive-OR products of corresponding pairs of domains of said first pattern and said time-sequenced pattern replace the interacting domains of said first pattern, in response to the detection of a selected domain by said sensing means.

Claim 13

A magnetic domain apparatus, including: a layer of material in which single-wall magnetic domains are movable; a first plurality of periodically repeating domain propagation elements arranged adjacent the surface of said layer in a looping shift register in the plane of said surface, for synchronously circulating thereabout a first pattern of domains representing binary information in response to a magnetic field reorienting a predetermined amount in the plane of said surface; a plurality of domain duplicators arranged adjacent the surface of said layer; a second plurality of periodically repeating domain propagation elements arranged adjacent the surface of said layer in a network of domain propagation channels which connect between individual ones of said plurality of duplicators at predetermined nodal locations in said network, the path lengths of said channels being selected to delay domains propagating therealong by different predetermined amounts so that a predetermined time-sequenced pattern of differently delayed domains arrives at a common element location defining the output of said network in response to a domain being propagated to an element location defining the input of said network; a first domain propagation channel connecting to the output of said network; means, having a first input and an output serially connected in said shift register and a second input connected through said first domain propagation channel to said output of said network, for performing Exclusive-OR logic between said first pattern of domains and said time-sequenced pattern of domains; and means, connected between a predetermined element location in said shift register and said input of said network, for sensing the presence of a selected domain at a predetermined element location in said shift register and gating a domain into said input of said network in response thereto, whereby the Exclusive-OR products of corresponding pairs of domains of said first pattern and said time-sequenced pattern replace the interacting domains of said first pattern, in response to the detection of a selected domain by said sensing means.