Patent US4697293A successfully refreshed from Google Patents.
US3772680A
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Digital transmission channel monitoring system
Assignee: NEC Corp
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Filing: 1971-07-30
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Granted: 1973-11-13
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Expires: 1991-07-30
Abstract
Abstract A digital transmission channel monitoring system including means for inserting at a transmitter the equivalent of a binary signal parity check bit into each of the n-digit code words of a multilevel signal. The parity check signal is inserted directly into the multi-level code words by detecting if the algebraic sum of the levels of the digits of each code word is an even or odd number. The level of one of the digits is then selectively changed so that the algebraic sum of the levels of the digits in each word is always either an even number or an odd number. At a receiver, each code word is investigated to determine the algebraic sum of the levels of its digits and an error signal is generated when incorrect parity is detected.
Inventors
- 👤 K Kawai
- 👤 R Maruta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 05:20
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
250 words
A digital transmission channel monitoring system comprising: a transmitting apparatus including, means for converting at least one binary signal into a multilevel code signal with code words each having m-level (where m is an integer greater than two and n is an integer greater than one) codes in which one bit can be inserted for the parity checking, means for detecting whether the algebraic sum of the levels of the individual digits of each of said code words is in the even or odd number, and means for inserting said one parity bit into each of said code words so that said algebraic sum is always on even or odd number depending on the outputs of said detecting means; and a receiving apparatus including; means for extracting a digit rate clock pulse from a received multilevel code signal, means for discriminating said received multilevel code signal by using said digit rate clock pulse, means for generating a word rate clock pluse from said digit rate clock pulse, means for obtaining a word synchronizing signal from the output of said discriminating means, means for converting said received multilevel code signal into at least one binary code signal by using said digit rate clock, the output of said discriminating means, said word rate clock, and said word synchronizing signal; and means for detecting whether the algebraic sum of each n-digit multilevel code in said received multilevel code signal is in the even or odd number as determined at the corresponding transmitting apparatus.
Claim 2
Dependent Claim
250 words
A digital transmission channel monitoring system comprising: a transmitting apparatus including, means for converting at least one binary signal into a multilevel code signal with code words each having m-level (where m is an integer greater than two and n is an integer greater than one) codes in which one bit can be inserted for the parity checking, means for detecting whether the algebraic sum of the levels of the individual digits of each of said code words is in the even or odd number, and means for inserting said one parity bit into each of said code words so that said algebraic sum is always on even or odd number depending on the outputs of said detecting means; and a receiving apparatus including; means for extracting a digit rate clock pulse from a received multilevel code signal, means for discriminating said received multilevel code signal by using said digit rate clock pulse, means for generating a word rate clock pluse from said digit rate clock pulse, means for obtaining a word synchronizing signal from the output of said discriminating means, means for converting said received multilevel code signal into at least one binary code signal by using said digit rate clock, the output of said discriminating means, said word rate clock, and said word synchronizing signal; and means for detecting whether the algebraic sum of each n-digit multilevel code in said received multilevel code signal is in the even or odd number as determined at the corresponding transmitting apparatus.
Claim 3
Dependent Claim
89 words
A transmitter including digital transmission channel monitoring apparatus comprising; means for converting at least one binary signal into a multi-level code signal of m-level n-digit code words, where m is an integer greater than one, means for detecting if the algebraic sum of the levels of the digits in each code word is an even or odd number, and means for selectively changing the level of one of the digits in each code word so that said algebraic sum is always an even number or always an odd number.
Claim 4
Dependent Claim
89 words
A transmitter including digital transmission channel monitoring apparatus comprising; means for converting at least one binary signal into a multi-level code signal of m-level n-digit code words, where m is an integer greater than one, means for detecting if the algebraic sum of the levels of the digits in each code word is an even or odd number, and means for selectively changing the level of one of the digits in each code word so that said algebraic sum is always an even number or always an odd number.
Claim 5
Dependent Claim
102 words
The transmitter of claim 2 wherein said means for converting includes means for converting two binary signals into a single multi-level code signal of n-digit code words, and includes means for generating signals representing the levels of the digits of said code words, said means for detecting being responsive to said generated signals, said means for selectively changing including means for suppressing a selected one of said generated signals and for generating a substitute signal representing a different level whereby the algebraic sum of the levels of the digits in each word is always either an even number or an odd number.
Claim 6
Dependent Claim
95 words
The transmitter of claim 3 further including means for transmitting the multi-level code signal, means for integrating the transmitted multi-level code signal to provide an indication of the D.C. level of the transmitted code signals, means for determining the polarity of said integrated code signal, means for determining the polarity of the algebraic sum of the levels of the digits in each additional code word, means for comparing the two determined polarities and means, responsive to said compare means, for inverting said additional code word prior to tRansmission when the compared polarities are the same.
Claim 7
Dependent Claim
115 words
The transmitter of claim 4 wherein said means for converting two binary signals into a single multi-level signal further comprises, first and second shift registers each storing n-bits, said first shift register receiving said first binary signal, said second shift register receiving said second binary signal, a diode matrix receiving in parallel the contents of said first and second shift registers and producing an output indicative of an n-digit multi-level code word, said means for generating signals representing the levels of the digits in each code word comprising gate means, responsive to the outputs of said diode matrix, for generating a parallel array of signals representing the levels of the digits in each code signal.
Claim 8
Dependent Claim
132 words
The transmitter of claim 5 wherein n 2 and wherein the level of one of the digits in each code word is initially selected as an odd number, said means for determining the algebraic sum including, OR gate means, coupled to said means for generating, for receiving only signals representing an odd valued level and logic means responsive to the output of said OR gate means and receiving signals representative of the level of the digit whose level is initially selected as an odd number, for suppressing the signals representing odd valued levels of said initially selected digit and generating in its place a signal representing an even valued level when the output of the OR gate indicates that the other digit in the code word is at an even valued level.
Claim 9
Dependent Claim
134 words
In a digital transmission channel monitoring system which includes a transmitter transmitting m-level n-digit code words where m is an integer greater than two and n is an integer greater than one, each code word having the level of one of its digits selectively changed such that the algebraic sum of the levels of the digits in each code word is always an even number or always an odd number, a receiver comprising, means for receiving said multi-level n-digit code words, means for detecting for each code word, if the algebraic sum of the levels of the digits in the word is an even or odd number, and means for producing an error signal when the algebraic sum is not always an even number or always an odd number as required by the transmitter.
Claim 10
Dependent Claim
134 words
In a digital transmission channel monitoring system which includes a transmitter transmitting m-level n-digit code words where m is an integer greater than two and n is an integer greater than one, each code word having the level of one of its digits selectively changed such that the algebraic sum of the levels of the digits in each code word is always an even number or always an odd number, a receiver comprising, means for receiving said multi-level n-digit code words, means for detecting for each code word, if the algebraic sum of the levels of the digits in the word is an even or odd number, and means for producing an error signal when the algebraic sum is not always an even number or always an odd number as required by the transmitter.
Claim 11
Dependent Claim
107 words
A digital transmission channel monitoring system comprising a transmitting apparatus including, means for converting two binary signals into an m-level code signal of two digit code words where m is an integer greater than two, means for detecting if the algebraic sum of the levels of the digits in each code word is an even or an odd number and means for providing a parity check bit in each word by selectively altering the level of one of the digits in each word so that the algebraic sum of the levels of the digits in the words are always an even number or always an odd number.
Claim 12
Dependent Claim
107 words
A digital transmission channel monitoring system comprising a transmitting apparatus including, means for converting two binary signals into an m-level code signal of two digit code words where m is an integer greater than two, means for detecting if the algebraic sum of the levels of the digits in each code word is an even or an odd number and means for providing a parity check bit in each word by selectively altering the level of one of the digits in each word so that the algebraic sum of the levels of the digits in the words are always an even number or always an odd number.
Claim 13
Dependent Claim
102 words
The monitoring system of claim 8 wherein the level of said one digit is initially always selected as an odd number, said means for providing a parity check bit at said transmitter includes, means for detecting if the level of the other digit is an even number or if it is an odd number and for altering the level of said one digit to an even number when the level of the other digit is determined to be an even number whereby the algebraic sum of the levels of the first and second digits in each word is always an even number.
Claim 14
Dependent Claim
71 words
The monitoring system of claim 9 further including receiver means for receiving the m-level code words said receiver means including, coincidence gate means receiving only signals representative of odd level digits and clock signals representing the digit rate and bistable circuit means receiving the output of said coincidence gate means for producing an error signal indicative of receiving signals representing an odd and an even level over one code word period.
Claim 15
Dependent Claim
101 words
The monitoring system of claim 8 wherein the level of said one digit is initially selected as an even number, said means for providing a parity check bit at the transmitter including; means for detecting if the level of the other digit is an even number or if it is an odd number and for altering the level of said one digit to an odd number when th level of the other digit is determined to be an even number whereby the algebraic sum of the levels of the first and second digits in each word is always an odd number.
Claim 16
Dependent Claim
137 words
An odd-even decision circuit for delivering a decision signal indicating if the algebraic sum of the levels in each word of a multilevel code signal is an odd number, comprising: means (51) for discriminating the level of each of the digits of said multilevel code signal to deliver binary discrimination signals corresponding to the levels of said multilevel code signal; an OR gate (65) for generating OR outputs of the discrimination signals corresponding to odd levels; an AND gate (66) for generating AND outputs of said OR outputs and a digit rate clock signal of said multilevel code signal; a binary counter (67) being reset by said word rate clock signal for counting said AND outputs in a binary form at each word of said multilevel code signal to deliver said decision signal from the outputs thereof.
Claim 17
Dependent Claim
137 words
An odd-even decision circuit for delivering a decision signal indicating if the algebraic sum of the levels in each word of a multilevel code signal is an odd number, comprising: means (51) for discriminating the level of each of the digits of said multilevel code signal to deliver binary discrimination signals corresponding to the levels of said multilevel code signal; an OR gate (65) for generating OR outputs of the discrimination signals corresponding to odd levels; an AND gate (66) for generating AND outputs of said OR outputs and a digit rate clock signal of said multilevel code signal; a binary counter (67) being reset by said word rate clock signal for counting said AND outputs in a binary form at each word of said multilevel code signal to deliver said decision signal from the outputs thereof.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-11-12 | 1977-05-14 | 1977-11-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-11-12 | 1981-05-14 | 1981-11-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-11-12 | 1985-05-14 | 1985-11-13 | $7700.00 | Window Closed / Lapsed |